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From: Mark Klein <mklein@dis.com>
To: law@cygnus.com
Cc: gcc@gcc.gnu.org
Subject: Re: HARD_REGNO_MODE_OK on PA-RISC (revisited)
Date: Tue, 24 Aug 1999 21:56:00 -0000	[thread overview]
Message-ID: <4.1.19990824214047.00ce42e0@garfield.dis.com> (raw)
In-Reply-To: <2443.935548630@upchuck.cygnus.com>

At 08:37 PM 8/24/99 -0600, Jeffrey A Law wrote:

>There is nothing wrong with requiring aligned registers, it is just
suboptimal.

The original question had to do with long double which according to the ACD
must be aligned on a 128 bit boundary. This is what works for long double.
If I'm missing something else, please refresh my memory, as it has been
over four months since I looked at this.

/* 
 * Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
 * 32 bit reg/subreg can fit in any general register. On PA1.0, FP regs
 * are 64 bits wide, but 32 bit quantities must be in the leftmost 32
 * bits of the FP register. On PA1.1, FP regs are still 64 bits wide,
 * but both halves can contain 32 bit quantities. In gcc, these registers
 * are each treated as a separate 32 bit FP register. So, modes greater
 * than 32 bits must be aligned on "even" registers. 128 bit floating
 * point must be aligned in evenly aligned FP registers on PA 1.0 and
 * because of the remapping for PA1.1, registers evenly divisible by 4.
 * For PA 1.0, disallow wide non-floating point modes in FP registers.
 */
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
  ((REGNO) == 0                                                         \
    ? (MODE) == CCmode || (MODE) == CCFPmode                            \
    : FP_REGNO_P (REGNO)                                                \
       ? !TARGET_PA_11                                                  \
          ? GET_MODE_SIZE (MODE) <= 4 ||                                \
            GET_MODE_CLASS (MODE) == MODE_FLOAT &&                      \
            (GET_MODE_SIZE (MODE) <= 8 && ((REGNO) & 1) == 0 ||         \
            ((REGNO) & 3) == 0)                                         \
          : GET_MODE_SIZE (MODE) <= 4  ||                               \
            (GET_MODE_SIZE (MODE) <= 8 && ((REGNO) & 1) == 0) ||        \
            ((REGNO) & 3) == 0                                          \
       : 1)


--
Mark Klein                                 DIS International, Ltd.
http://www.dis.com                         415-892-8400
PGP Public Key Available			

WARNING: multiple messages have this Message-ID
From: Mark Klein <mklein@dis.com>
To: law@cygnus.com
Cc: gcc@gcc.gnu.org
Subject: Re: HARD_REGNO_MODE_OK on PA-RISC (revisited)
Date: Tue, 31 Aug 1999 23:20:00 -0000	[thread overview]
Message-ID: <4.1.19990824214047.00ce42e0@garfield.dis.com> (raw)
Message-ID: <19990831232000.fSPTXyJUyqeQ5s8YtIMYOl2Pqdj5qHZso2NB2upMG78@z> (raw)
In-Reply-To: <2443.935548630@upchuck.cygnus.com>

At 08:37 PM 8/24/99 -0600, Jeffrey A Law wrote:

>There is nothing wrong with requiring aligned registers, it is just
suboptimal.

The original question had to do with long double which according to the ACD
must be aligned on a 128 bit boundary. This is what works for long double.
If I'm missing something else, please refresh my memory, as it has been
over four months since I looked at this.

/* 
 * Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
 * 32 bit reg/subreg can fit in any general register. On PA1.0, FP regs
 * are 64 bits wide, but 32 bit quantities must be in the leftmost 32
 * bits of the FP register. On PA1.1, FP regs are still 64 bits wide,
 * but both halves can contain 32 bit quantities. In gcc, these registers
 * are each treated as a separate 32 bit FP register. So, modes greater
 * than 32 bits must be aligned on "even" registers. 128 bit floating
 * point must be aligned in evenly aligned FP registers on PA 1.0 and
 * because of the remapping for PA1.1, registers evenly divisible by 4.
 * For PA 1.0, disallow wide non-floating point modes in FP registers.
 */
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
  ((REGNO) == 0                                                         \
    ? (MODE) == CCmode || (MODE) == CCFPmode                            \
    : FP_REGNO_P (REGNO)                                                \
       ? !TARGET_PA_11                                                  \
          ? GET_MODE_SIZE (MODE) <= 4 ||                                \
            GET_MODE_CLASS (MODE) == MODE_FLOAT &&                      \
            (GET_MODE_SIZE (MODE) <= 8 && ((REGNO) & 1) == 0 ||         \
            ((REGNO) & 3) == 0)                                         \
          : GET_MODE_SIZE (MODE) <= 4  ||                               \
            (GET_MODE_SIZE (MODE) <= 8 && ((REGNO) & 1) == 0) ||        \
            ((REGNO) & 3) == 0                                          \
       : 1)


--
Mark Klein                                 DIS International, Ltd.
http://www.dis.com                         415-892-8400
PGP Public Key Available			

  parent reply	other threads:[~1999-08-24 21:56 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
1999-04-19 10:28 Mark Klein
1999-04-30 23:15 ` Mark Klein
     [not found] ` <2443.935548630@upchuck.cygnus.com>
1999-08-24 21:56   ` Mark Klein [this message]
1999-08-26 23:23     ` Jeffrey A Law
1999-08-27  7:16       ` Mark Klein
1999-08-27 15:11         ` Jeffrey A Law
1999-08-27 17:20           ` Mark Klein
1999-08-29  3:19             ` Jeffrey A Law
1999-08-29 15:36               ` MPE Port (was HARD_REGNO_MODE_OK) Mark Klein
1999-08-30  1:54                 ` Jeffrey A Law
1999-08-31 23:20                   ` Jeffrey A Law
1999-08-31 23:20                 ` Mark Klein
1999-08-31 23:20               ` HARD_REGNO_MODE_OK on PA-RISC (revisited) Jeffrey A Law
1999-09-06 10:39               ` MPE Port Mark Klein
1999-09-30 18:02                 ` Mark Klein
1999-08-31 23:20             ` HARD_REGNO_MODE_OK on PA-RISC (revisited) Mark Klein
1999-08-31 23:20           ` Jeffrey A Law
1999-08-31 23:20         ` Mark Klein
1999-08-31 23:20       ` Jeffrey A Law
1999-08-31 23:20     ` Mark Klein

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