Re: user-guided speculative precomputation? (my wacky ia64 idea)

[Duraid Madina <duraid@octopus.com.au>]

Jim Wilson wrote:
> Duraid Madina wrote:
> 
>> tricky to do this automatically, but my question to the group is: 
>> would it be sensible to add support for something like a "#pragma 
>> delinquent_load" that could be inserted at the appropriate point in 
>> e.g. graph/tree/list traversal code etc.? A "cookie cutter" 
>> prefetching sequence could then be fitted in the reserved area 
>> alongside the main thread
>
> You didn't define what #pragma delinquent_load does, and I don't have a 
> copy of that paper.

The paper is freely available here:

http://www.hpcaconf.org/hpca8/program/papers/wang_memory_tolerance.ps

and well worth reading for anyone interested in this kind of 
optimization or just wondering what future IA64 processors might be like.

This #pragma would be added to code such as (taken from 
http://www.intel.com/technology/itj/2002/volume06issue01/art03_specprecomp/p06_xeon.htm 
)

{
	n = NodeArray[0];
	while(n && remaining)
	{
		doSomeWork();
#pragma delinquent_load
		n->i = n->next->j + n->next->k + n->next->l;
		n = n->next;
		remaining--;
	}
}

because the line following the pragma, in many cases, would be 
responsible for nearly 100% of the L2 or L3 misses of a program, and 
therefore responsible for a significant fraction of the program's 
execution time if doSomeWork() doesn't actually do a _lot_ of work, 
which is very common in things to do with graph traversal (e.g. database 
querying etc)

The pragma signals two things to the compiler:

	- The following line is responsible for a very high proportion of total 
L2/L3 cache misses (in case you're wondering, many real world programs 
seem to be well characterised in this way, having only a few delinquent 
loads despite being very large programs)

	- The LHS of the following line is probably involved in both loop 
control as well as the loop body

> Probably you would have to try to implement it before you can tell 
> whether you can make it work.

mm. Me and my big mouth..

> The limited number of bundle formats makes it difficult to reserve an 
> issue slot.  You will get differing types of left-over slots depending 
> on what instructions from the main thread get scheduled, and you will 
> have differing types of insns that need to fit into those slots.  This 
> could lead to a difficult packing problem.  And there is also the issue 
> of stop bits.

Agreed, though I trust that by "difficult packing problem" you mean a 
problem that might not be very likely to succeed, not a computationally 
difficult task. The thing that gives me hope is that the other 'thread' 
really doesn't have to do a lot at all; it just has to dereference 
pointers, and loop. Still, when at the mercy of the primary thread's 
branching it might be difficult to get such a thing running usefully 
alongside the main computation, even if a great deal of the chasing 
thread's execution state can be stored in (e.g.) some reserved global 
registers. I'm really not sure that the bundle formats will be such a 
big restriction, because if you take a look at what GCC emits for 
"pointer-mad" code, there's often quite a bit of room to move.

	Duraid