From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from esa4.mentor.iphmx.com (esa4.mentor.iphmx.com [68.232.137.252]) by sourceware.org (Postfix) with ESMTPS id 0A4B83858CDA for ; Wed, 11 Oct 2023 14:49:15 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 0A4B83858CDA Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=codesourcery.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=mentor.com X-CSE-ConnectionGUID: AfmaKSowSqiG9xBLnEsi+w== X-CSE-MsgGUID: rWFaPjPmQ/Wub9pmbYuSVA== X-IronPort-AV: E=Sophos;i="6.03,216,1694764800"; d="scan'208";a="19151361" Received: from orw-gwy-02-in.mentorg.com ([192.94.38.167]) by esa4.mentor.iphmx.com with ESMTP; 11 Oct 2023 06:49:13 -0800 IronPort-SDR: lW97FjzPZ8NfM04cR3cTDY8PO27S0YQOi7zWXsIrd+zWmdeWFSLB8wpLvAu6+qxYpuCjHw/gIN smO9lrcevtzdZgw2Sj1KeGxyvNYlBDCNcB5UDT87rq2uYUYcK5NpgrsB5DLSiNfMMzOnDinCGJ kVjtaFIbXEMM2Jzqf+29oXrbjimK8Z5j94rUCg7QQRs59K7hiYIVA17IzZiQ6vs7I3I3ZkP+Aw 8bl6bC96ouDpme3VySegCKKWN4MFBYeYvrZbBJB3npuLu2GZT9RE8Z5g7tWbuQ3rEz9MjG3rhZ 5r8= Message-ID: <47455696-961b-4e27-9ba2-4c85bbfa2037@codesourcery.com> Date: Wed, 11 Oct 2023 15:49:08 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Register allocation cost question Content-Language: en-GB To: Segher Boessenkool CC: gcc mailing list References: <9c350ebd-fd67-4975-abee-68787f97c383@codesourcery.com> <20231010190930.GV19790@gate.crashing.org> From: Andrew Stubbs In-Reply-To: <20231010190930.GV19790@gate.crashing.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [137.202.0.90] X-ClientProxiedBy: svr-ies-mbx-11.mgc.mentorg.com (139.181.222.11) To svr-ies-mbx-11.mgc.mentorg.com (139.181.222.11) X-Spam-Status: No, score=-6.0 required=5.0 tests=BAYES_00,HEADER_FROM_DIFFERENT_DOMAINS,KAM_DMARC_STATUS,SPF_HELO_PASS,SPF_PASS,TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 10/10/2023 20:09, Segher Boessenkool wrote: > Hi Andrew, > > On Tue, Oct 10, 2023 at 04:11:18PM +0100, Andrew Stubbs wrote: >> I'm also seeing wrong-code bugs when I allow more than 32 new registers, >> but that might be an unrelated problem. Or the allocation is broken? I'm >> still analyzing this. > > It could be connected. both things should not happen. This is now confirmed to be unrelated: the instruction moving values from the new registers to the old must be followed by a no-op in certain instruction combinations due to GCN having only partial hardware dependency detection. The register allocation is therefore valid (at least in the testcases I've been looking at). The question of why it prefers registers with round numbers remains open (and important for optimization reasons). Andrew