From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 70896 invoked by alias); 20 Jun 2018 12:56:20 -0000 Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org Received: (qmail 70876 invoked by uid 89); 20 Jun 2018 12:56:20 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.8 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 spammy=rr, H*f:sk:28179a1, H*i:sk:28179a1, Hx-spam-relays-external:ESMTPA X-HELO: resqmta-po-09v.sys.comcast.net Received: from resqmta-po-09v.sys.comcast.net (HELO resqmta-po-09v.sys.comcast.net) (96.114.154.168) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 20 Jun 2018 12:56:18 +0000 Received: from resomta-po-02v.sys.comcast.net ([96.114.154.226]) by resqmta-po-09v.sys.comcast.net with ESMTP id Vc7BfpqBSEEmzVcenf3jEZ; Wed, 20 Jun 2018 12:56:17 +0000 Received: from [192.168.10.125] ([73.60.223.101]) by resomta-po-02v.sys.comcast.net with ESMTPA id VcelfmZzPJHSoVcemfMgOt; Wed, 20 Jun 2018 12:56:17 +0000 Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 11.4 \(3445.8.2\)) Subject: Re: divmod pattern question From: Paul Koning In-Reply-To: <28179a1c-01b8-a99b-fefd-cf75fcdff2fc@redhat.com> Date: Wed, 20 Jun 2018 13:05:00 -0000 Cc: GCC Development Content-Transfer-Encoding: quoted-printable Message-Id: <487E380F-28B1-468E-B1C0-56E3C2239E6A@comcast.net> References: <65296BEC-0850-41E8-A5D0-FC8FFA4C17E5@comcast.net> <28179a1c-01b8-a99b-fefd-cf75fcdff2fc@redhat.com> To: Jeff Law , Andreas Schwab X-CMAE-Envelope: MS4wfNmXFxXXa2wKycIVHS5BrrqG9f1uHAkJJdhKNbyKSQEdonmR9vhN3+iQiybVUpWnZxh9u3gU7ad+9zp4dI3vGIgOBW7uRwzYCGtsGDZKtUfakBSTzS+k jRhJrcNLWDfDDqOscZdOJ5bWOpPQDdPX8CQqHyWcqubiob/9Tr2ZLP0nxVgR4zZaShprwmLRDfAzYXaYFUYHgE5oGKeSCVIsUR4pMTe0jJmkFE6MPGF2blpC X-SW-Source: 2018-06/txt/msg00214.txt.bz2 > On Jun 20, 2018, at 1:16 AM, Jeff Law wrote: >=20 > On 06/19/2018 12:55 PM, Paul Koning wrote: >> Gentlepeople, >>=20 >> I have a two-operand divide instruction that takes a double length divid= end in a register pair, and produces the quotient in the first register and= remainder in the second. >>=20 >> How do I write a divmod pattern for that? The quotient is easy enough, = I write a match_operand for that register and a matching constraint ("0") f= or the input dividend. But what about the remainder? The remainder appear= s in a register that isn't explicitly mentioned in the RTL (it's the regnum= one higher than the quotient, or if you like, the second subreg of the inp= ut (dividend) register. > You can generally allocate double-sized registers with appropriate > constraints and the like. And you could use matching constraints, > perhaps with subregs, but in the end, ewwwww. >=20 >>=20 >> I can make it a define_expand that adds a move from the remainder regist= er into a new register which is the output operand, and count on the optimi= zer to optimize away that move. Is that the best answer? The current "mod= " pattern does that, and I could keep that approach. > But this would generally be better I think. I'd expect the move to be > optimized away the vast majority of the time. Thanks. I looked at some others, like M68k, the difference there is that t= he mod result goes to an explicitly named register in the machine instructi= on. Here's what I ended up with; it seems to work even though it doesn't match = precisely what the documentation seems to call for. (define_expand "divmodhi4" [(parallel [(set (subreg:HI (match_dup 1) 0) (div:HI (match_operand:SI 1 "register_operand" "0") (match_operand:HI 2 "general_operand" "g"))) (set (subreg:HI (match_dup 1) 2) (mod:HI (match_dup 1) (match_dup 2)))]) (set (match_operand:HI 0 "register_operand" "=3Dr") (subreg:HI (match_dup 1) 0)) (set (match_operand:HI 3 "register_operand" "=3Dr") (subreg:HI (match_dup 1) 2))] "TARGET_40_PLUS" "") ; and then the actual final instruction: (define_insn "divmodhi4_nocc" [(set (subreg:HI (match_operand:SI 0 "register_operand" "=3Dr,r") 0) (div:HI (match_operand:SI 1 "register_operand" "0,0") (match_operand:HI 2 "general_operand" "rR,Qi"))) (set (subreg:HI (match_dup 1) 2) (mod:HI (match_dup 1) (match_dup 2))) (clobber (reg:CC CC_REGNUM))] "TARGET_40_PLUS" "div %2,%0" [(set_attr "length" "2,4")]) paul