From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 23313 invoked by alias); 3 Sep 2009 15:40:32 -0000 Received: (qmail 23302 invoked by uid 22791); 3 Sep 2009 15:40:31 -0000 X-SWARE-Spam-Status: No, hits=-2.5 required=5.0 tests=AWL,BAYES_00,SPF_HELO_PASS,SPF_PASS X-Spam-Check-By: sourceware.org Received: from mx1-old.redhat.com (HELO mx1.redhat.com) (66.187.233.31) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 03 Sep 2009 15:40:20 +0000 Received: from int-mx1.corp.redhat.com (int-mx1.corp.redhat.com [172.16.52.254]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id n83FeGjc007159; Thu, 3 Sep 2009 11:40:16 -0400 Received: from omfg.slc.redhat.com (vpn-12-83.rdu.redhat.com [10.11.12.83]) by int-mx1.corp.redhat.com (8.13.1/8.13.1) with ESMTP id n83FeFTg009809; Thu, 3 Sep 2009 11:40:16 -0400 Message-ID: <4A9FE3AC.4010500@redhat.com> Date: Thu, 03 Sep 2009 15:40:00 -0000 From: Jeff Law User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.1.1) Gecko/20090814 Fedora/3.0-2.6.b3.fc11 Thunderbird/3.0b3 MIME-Version: 1.0 To: Dave Korn CC: Mohamed Shafi , GCC Subject: Re: Reloading is going wrong? References: <4A9FE449.9060604@gmail.com> In-Reply-To: <4A9FE449.9060604@gmail.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-IsSubscribed: yes Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org X-SW-Source: 2009-09/txt/msg00079.txt.bz2 On 09/03/09 09:44, Dave Korn wrote: > Mohamed Shafi wrote: > > >> The restriction is that if the base >> register is not Stack Pointer then this kind of address cannot come in >> a load instruction but only in store instruction. >> >> To implement this i added constrains for all supported memory >> operations in QImode. So the pattern is as follows >> >> (define_insn "movqi" >> [(set (match_operand:QI 0 "nonimmediate_operand" >> "=b,b,d,t,d, b,Ss0, Ss1, a,Se1, Sb2, b,Sd3, d,Se0") >> (match_operand:QI 1 "general_operand" >> "I,L,d,d,t, Ss0,b, b, Se1,a, b, Sd3,b, Se0,d"))] >> >> where >> d is data registers >> a is address registers >> b is data and address registers >> Sb2 is Rn + offset addressing mode >> Sd3 is SP + offset addressing mode >> >> Se0 - (Rn), (Rn)+, (Rn)-, (Rn + Ri) and Post modify register addressing mode >> Se1 - Se0 excluding Post modify register addressing mode >> >> I believe that there are enough combinations available for the reload >> to try for alternate addressing mode if it encounters the restrictive >> addressing mode. But I am still getting the following error >> >> main1.c:11: error: insn does not satisfy its constraints: >> (insn 30 29 7 2 main1.c:9 (set (reg:QI 2 d2 [orig:61.a+1 ] [61]) >> (mem/s/j:QI (plus:SI (reg:SI 16 r0) >> (const_int 1 [0x1])) [0.a+1 S1 A8])) 41 >> {movqi} (nil)) >> main1.c:11: internal compiler error: in reload_cse_simplify_operands, >> at postreload.c:396 >> > This approach can't work. There has to be a combination of constraints to > accept any and every combination of operands permitted by the predicates > "nonimmediate_operand" and "general_operand". Since neither of these exclude > base registers beside the SP, they make it through to recog which punts when > it can't find a which_alternative set to use. In this case general_operand > has allowed an operand of type (mem (plus (reg) (const)), equivalent to your > Sb2 constraint, but there is no constraint for operand 1 that permits that. > > You can't use constraints to filter the initial selection performed by > predicates. What I think you need to do is to have a variant version of > general_operand that refuses Sb2 types. > Also note that reload does not distinguish between a load and a store when verifying the legitimacy of an address, meaning that reload doesn't handle cases where a particular addressing mode is available for loads, but not stores (or vice-versa). This can be worked around with careful selection of operand predicates, secondary reloads, sometimes additional patterns. It's been a long time since I worked on a port with this kind of characteristic, so I can't offhand give a recipe to make it work. Obviously looking at how other ports with these characteristics handle this case would be useful. The PA for example has integer indexed loads, but no integer indexed stores. There's likely other ports with similar characteristics as well. Jeff