From: Jim Wilson <wilson@codesourcery.com>
To: roy rosen <roy.1rosen@gmail.com>
Cc: gcc@gcc.gnu.org
Subject: Re: lower subreg optimization
Date: Fri, 09 Apr 2010 16:52:00 -0000 [thread overview]
Message-ID: <4BBF597D.4000501@codesourcery.com> (raw)
In-Reply-To: <i2vbba479b11004072248gabfac370o3737996793a15d6c@mail.gmail.com>
On 04/07/2010 10:48 PM, roy rosen wrote:
> I saw in arm/neon.md that they have a similar problem:
> ...
> Their solution is also not complete.
> What is the proper way to handle such a case and how do I let gcc know
> that this is a simple move instruction so that gcc would be able to
> optimize it out?
The only simple solution at the moment is the one that the ARM port is
using. You avoid emitting the move when you got the lucky reg-alloc
result, and you emit the move when you aren't lucky.
As the neon.md comment suggests, and as Ian Taylor mentioned in his
response, a possible solution is to modify the lower-subreg.c pass
somehow so that it no longer splits subregs of vector modes, possibly
controlled by a hook.
We might be able to modify the register allocator to look for this
pattern, to increase the chances of getting the good reg-alloc result,
but the lower-subreg.c change is probably better.
Another solution might be to add a pass (or modify an existing one like
regmove.c) to try to put things back together again, but this is
probably also not as good as the lower-subreg.c change.
Jim
next prev parent reply other threads:[~2010-04-09 16:44 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-04-06 9:24 roy rosen
2010-04-06 16:37 ` Jim Wilson
2010-04-08 6:16 ` roy rosen
2010-04-09 16:52 ` Jim Wilson [this message]
2010-04-06 16:58 ` Ian Lance Taylor
2010-04-06 17:13 ` Nathan Froyd
2010-04-06 17:27 ` Steven Bosscher
2010-04-06 18:55 ` Ian Lance Taylor
2010-04-06 19:05 ` Nathan Froyd
2010-04-06 19:23 ` Joseph S. Myers
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