From: Vladimir Makarov <vmakarov@redhat.com>
To: Richard Guenther <richard.guenther@gmail.com>
Cc: "Paulo J. Matos" <paulo@matos-sorge.com>, gcc@gcc.gnu.org
Subject: Re: Move insn out of the way
Date: Thu, 11 Aug 2011 14:27:00 -0000 [thread overview]
Message-ID: <4E43E6BC.90003@redhat.com> (raw)
In-Reply-To: <CAFiYyc01HT2G=+j8ms1U97NdQkKYJufA8d4fGQ6WVMOpkJxdoA@mail.gmail.com>
On 08/11/2011 04:49 AM, Richard Guenther wrote:
> On Thu, Aug 11, 2011 at 10:11 AM, Paulo J. Matos<paulo@matos-sorge.com> wrote:
>> On Thu, Aug 11, 2011 at 1:01 AM, Vladimir Makarov<vmakarov@redhat.com> wrote:
>>> I can not reproduce the problem. It would be nice to give all info (the
>>> code without includes and all options). In this case I could have more info
>>> to say more definitely about the reason of the problem in IRA.
>>>
>> One of the issue with these problems of mine is that they are tied to
>> my backend, but not always. I think I managed to reproduce a similar
>> result in the avr backend using GCC4.6.1
>>
>> test.c:
>> long long x;
>> _Bool mask (long long a)
>> {
>> return (x& a) == a;
>> }
>>
>> $ avr-cc1 -Os test.c
>>
>> This generates the following assembler:
>> mask:
>> push r13
>> push r14
>> push r15
>> push r16
>> push r17
>> /* prologue: function */
>> /* frame size = 0 */
>> /* stack size = 5 */
>> .L__stack_usage = 5
>> lds r14,x
>> and r14,r18
>> lds r15,x+1
>> and r15,r19
>> lds r16,x+2
>> and r16,r20
>> lds r17,x+3
>> and r17,r21
>> lds r27,x+4
>> and r27,r22
>> lds r26,x+5
>> and r26,r23
>> lds r31,x+6
>> and r31,r24
>> lds r30,x+7
>> and r30,r25
>> clr r13
>> inc r13
>> cp r14,r18
>> brne .L3
>> cp r15,r19
>> brne .L3
>> cp r16,r20
>> brne .L3
>> cp r17,r21
>> brne .L3
>> cp r27,r22
>> brne .L3
>> cp r26,r23
>> brne .L3
>> cp r31,r24
>> brne .L3
>> cpse r30,r25
>> .L3:
>> clr r13
>> .L2:
>> mov r24,r13
>> /* epilogue start */
>> pop r17
>> pop r16
>> pop r15
>> pop r14
>> pop r13
>> ret
>> .size mask, .-mask
>> .comm x,8,1
>>
>>
>> I can't tell how good or bad this assembler is but I note a couple of
>> similarities with my backends assembler output:
>> - It doesn't do if-conversion like Richard suggested. So (x& a) == a
>> is not converted to ((xl& al) ^ al) | ((xh& ah) ^ ah) == 0.
>> - The assignment of r13 to 1 is done as 'clr r13; inc r13' _before_ the jumps.
>>
>> The only assignment to r13 is as in my case after the jumps as 'clr
>> 13' to set up the return value. I am not sure if this situation causes
>> a lot of register pressure, however I think it doesn't in avr but it
>> does in my backend. AVR has 32 registers to play with, mine can only
>> deal with 3 in the destination operand position.
> What I was expecting IRA to do is
>
> 1) split live-range at kills, thus if a constant is assigned to a pseudo
> then the constant has its own live-range
>
> 2) pseudos that are equal to a constant are assigned hard registers
> last if re-materializing them during reload is cheaper than spilling them
>
> I suspect that 1) is not happening, I hope that 2) would happen already.
>
> Correct?
>
Yes, that is mostly correct. The first could be done by -fweb (if
the live range where the pseudo is equal to the constant is disjoint).
The first could be done also by Jeff Law's project which can provide
splitting not only on the border of loops.
Some problems might be solved even in LRA (a new project I am working
on) which would spill the pseudo assigned to constant, assign the hard
registers to conflicting non-reload pseudos (spilled in IRA) and inherit
the hard register for the reload pseudos of the spilled pseudo (if insns
can not use the constant directly) achieving this way live range
splitting for the spilled pseudo. Reload pass can not do this because
it does not assign hard registers to pseudos spilled in IRA when a hard
register is freed by spilling a conflicting pseudo for reloads.
Actually the same problem exists in the old RA. IRA is different from
it mostly by:
o live range splitting at the most important program points (loop borders)
o better coloring
o better choosing hard registers
o better coalescing
o better communication with reload pass
next prev parent reply other threads:[~2011-08-11 14:27 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-10 11:20 Paulo J. Matos
2011-08-10 11:40 ` Richard Guenther
2011-08-10 11:42 ` Richard Guenther
2011-08-10 13:55 ` Paulo J. Matos
[not found] ` <4E431BD8.8060705@redhat.com>
2011-08-11 8:12 ` Paulo J. Matos
2011-08-11 8:49 ` Richard Guenther
2011-08-11 14:27 ` Vladimir Makarov [this message]
2011-08-12 10:01 ` Paulo J. Matos
2011-08-12 14:22 ` Vladimir Makarov
2011-08-12 15:06 ` Paulo J. Matos
2011-08-12 16:12 ` Jeff Law
2011-08-11 12:22 ` Paulo J. Matos
2011-08-10 13:46 ` Paulo J. Matos
2011-08-10 13:51 ` Richard Guenther
2011-08-10 14:14 ` Paulo J. Matos
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4E43E6BC.90003@redhat.com \
--to=vmakarov@redhat.com \
--cc=gcc@gcc.gnu.org \
--cc=paulo@matos-sorge.com \
--cc=richard.guenther@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).