Re: my EGCS status (really Fortran patches)

[Jeffrey A Law <law@cygnus.com>]

  In message <9710211752.AA19479@moene.indiv.nluug.nl>you write:
  > >  The simplify_giv_expr change makes sense.  I haven't
  > >  tried building a PA compiler to see why it sometimes
  > >  gives worse code.
  > 
  > I must confess that I only tested code with perfectly nested loops  
  > (i.e. no code in the outer loop, like above).  I don't know if that  
  > would make a difference.
For reference, I believe part of the problem is loop doesn't
recognize that some of the more complex expressions that the
new USE patch recognizes as GIVS are related.

Given the example fortran code in my last message, we find the
following in the .loop file:

Reg 101: biv verified
Reg 96: biv verified
Biv 101 initialized at insn 272: initial value (reg:SI 102)
Biv 96 initialized at insn 24: initial value (reg/v:SI 97)
Insn 38: giv reg 105 src reg 96 benefit 2 used 1 lifetime 1 replaceable mult 1 add -1
Insn 42: giv reg 107 src reg 96 benefit 4 used 1 lifetime 13 replaceable mult 8 add -8
Insn 51: giv reg 113 src reg 96 benefit 6 used 1 lifetime 23 replaceable mult 8 add (plus:SI (reg:SI 112)
    (const_int -8))
Insn 52: giv reg 114 src reg 96 benefit 8 used 1 lifetime 19 replaceable mult 8 add (plus:SI (reg:SI 103)
    (plus:SI (reg:SI 112)
        (const_int -8)))
Insn 86: giv reg 138 src reg 96 benefit 8 used 1 lifetime 6 replaceable mult 8 add (plus:SI (reg:SI 127)
    (plus:SI (reg:SI 112)
        (const_int -8)))
Insn 101: giv reg 148 src reg 96 benefit 6 used 1 lifetime 16 replaceable mult 8 add (plus:SI (reg:SI 147)
    (const_int -8))
Insn 102: giv reg 149 src reg 96 benefit 8 used 1 lifetime 2 replaceable mult 8 add (plus:SI (reg:SI 103)
    (plus:SI (reg:SI 147)
        (const_int -8)))
Insn 104: dest address src reg 96 benefit 9 used 1 lifetime 1 replaceable mult 8 add (plus:SI (plus:SI (reg:SI 112)
        (const_int -8))
    (reg:SI 127))
Insn 106: dest address src reg 96 benefit 9 used 1 lifetime 1 replaceable mult 8 add (plus:SI (plus:SI (reg:SI 147)
        (const_int -8))
    (reg:SI 103))
Insn 109: dest address src reg 96 benefit 9 used 1 lifetime 1 replaceable mult 8 add (plus:SI (plus:SI (reg:SI 112)
        (const_int -8))
    (reg:SI 103))
Insn 127: giv reg 166 src reg 96 benefit 8 used 1 lifetime 1 replaceable mult 8 add (plus:SI (reg:SI 155)
    (plus:SI (reg:SI 112)
        (const_int -8)))
Insn 129: dest address src reg 96 benefit 9 used 1 lifetime 1 replaceable mult 8 add (plus:SI (plus:SI (reg:SI 112)
        (const_int -8))
    (reg:SI 155))
Insn 132: dest address src reg 96 benefit 9 used 1 lifetime 1 replaceable mult 8 add (plus:SI (plus:SI (reg:SI 112)
        (const_int -8))
    (reg:SI 103))
Insn 150: giv reg 180 src reg 96 benefit 8 used 1 lifetime 7 replaceable mult 8 add (plus:SI (reg:SI 169)
    (plus:SI (reg:SI 112)
        (const_int -8)))
Insn 200: giv reg 215 src reg 96 benefit 8 used 1 lifetime 1 replaceable mult 8 add (plus:SI (reg:SI 169)
    (plus:SI (reg:SI 147)
        (const_int -8)))
Insn 204: dest address src reg 96 benefit 9 used 1 lifetime 1 replaceable mult 8 add (plus:SI (plus:SI (reg:SI 147)
        (const_int -8))
    (reg:SI 169))
Insn 207: dest address src reg 96 benefit 9 used 1 lifetime 1 replaceable mult 8 add (plus:SI (plus:SI (reg:SI 112)
        (const_int -8))
    (reg:SI 169))
Insn 230: dest address src reg 96 benefit 9 used 1 lifetime 1 replaceable mult 8 add (plus:SI (plus:SI (reg:SI 112)
        (const_int -8))
    (reg:SI 169))
Loop unrolling: Initial value not constant.
Cannot eliminate biv 101.
First use: insn 26, last use: insn 31.
biv 96 can be eliminated.
giv at 207 combined with giv at 230
giv at 109 combined with giv at 132
giv of insn 38 not worth while, 0 vs 42.
giv at 230 reduced to (reg:SI 246)
giv at 207 reduced to (reg:SI 246)
giv at 204 reduced to (reg:SI 251)
giv at 200 reduced to (reg:SI 256)
giv at 150 reduced to (reg:SI 261)
giv at 132 reduced to (reg:SI 266)
giv at 129 reduced to (reg:SI 271)
giv at 127 reduced to (reg:SI 276)
giv at 109 reduced to (reg:SI 266)
giv at 106 reduced to (reg:SI 281)
giv at 104 reduced to (reg:SI 286)
giv at 102 reduced to (reg:SI 291)
giv at 101 reduced to (reg:SI 296)
giv at 86 reduced to (reg:SI 300)
giv at 52 reduced to (reg:SI 305)
giv at 51 reduced to (reg:SI 310)
giv at 42 reduced to (reg:SI 314)


So, we see that all the givs share the same biv & mult_val.

May share partial expressions in add_val, but the add_val as a whole
generally isn't the same for each giv -- for example:


Insn 230: dest address src reg 96 benefit 9 used 1 lifetime 1 replaceable mult 8 add (plus:SI (plus:SI (reg:SI 112)
        (const_int -8))
    (reg:SI 169))

Insn 204: dest address src reg 96 benefit 9 used 1 lifetime 1 replaceable mult 8 add (plus:SI (plus:SI (reg:SI 147)
        (const_int -8))
    (reg:SI 169))



jeff