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Sun, 10 Dec 2023 10:27:09 -0800 (PST) Received: from [172.31.0.109] ([136.36.72.243]) by smtp.gmail.com with ESMTPSA id y72-20020a62ce4b000000b006cb7bdbc3besm5219971pfg.17.2023.12.10.10.27.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 10 Dec 2023 10:27:08 -0800 (PST) Message-ID: <6e354942-bab6-4d31-b466-a068d8c7ce9a@gmail.com> Date: Sun, 10 Dec 2023 11:27:03 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] strub: disable on rl78 Content-Language: en-US To: Alexandre Oliva Cc: DJ Delorie , gcc@gcc.gnu.org References: <36cf0c78-76ac-40e0-87fd-1c73506ba516@gmail.com> From: Jeff Law In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,KAM_NUMSUBJECT,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,TXREP,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org List-Id: On 12/8/23 19:18, Alexandre Oliva wrote: > Hello, Jeff, DJ, > > Thanks for the info. > > On Dec 7, 2023, Jeff Law wrote: > >> On 12/6/23 15:03, DJ Delorie wrote: >>> Alexandre Oliva writes: >>>> This looks like a latent bug in the port. >>> I'm not surprised, that port was weird. >>> >>>> This was just a plain asm insn in strub.c: >>>> >>>> /* Make sure the stack overwrites are not optimized away. */ >>>> asm ("" : : "m" (end[0])); >>>> >>>> whose constraint passes during reload, rl78_alloc_physical_registers >>>> leaves it alone and clears virt_insns_ok, so when cprog_hardreg attempts >>>> to extract constraints again, rl78_as_legitimate_address rejects r8 as >>>> the address because virt insns are no longer ok. >>> Some background: the "virtual" registers are memory-mapped registers >>> that use a common addressing scheme to access non-mapped registers. >>> When we convert from virtual to physical, we can map that reg to a >>> physical reg, or we replace the reg with a mem, but then usually have to >>> split up the insn. >>> For this insn, "converting" should have mapped or reloaded r8 to a >>> valid >>> address register. I doubt we have a way to have two patterns for user >>> asms like we do for, say, addhi3. > > *nod*, the virt-to-phys "reloader" should care of it it, but it doesn't > because it explicitly punts on most ASMs, and it sort-of implicitly > punts on inputs-only asms like the one in strub.c. > >> Given we don't know the semantics of what goes on inside the MEM I >> think rewriting would be extraordinarily difficult. > > ISTM that it would need to know what's inside, any more than it (or > reload) does. It just needs to find (or make) some available phys > register and use that as the address instead of the virt register, like > it presumably does for other kinds of insns. > >> I wouldn't lose any sleep if we had a way to simply disable strub for rl78. > > Now that we have easy means to do that, it became irresistible ;-) > > Tested building libgcc (all multilibs) with a cross rl78-elf. Ok to install? > > > rl78 allocation of virtual registers to physical registers doesn't > operate on asm statements, and strub uses asm statements in the > runtime and in the generated code, to the point that the runtime > won't build. Force strub disabled on that target. > > > for gcc/ChangeLog > > * config/rl78/rl78.c (TARGET_HAVE_STRUB_SUPPORT_FOR): Disable. > --- > gcc/config/rl78/rl78.cc | 5 +++++ > 1 file changed, 5 insertions(+) OK for the trunk. THanks. jeff >