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To: sje@cup.hp.com
Cc: gcc@gcc.gnu.org
Subject: Re: IA64 floating point division question
References: <200408312246.PAA26407@hpsje.cup.hp.com>
From: Zack Weinberg <zack@codesourcery.com>
Date: Tue, 31 Aug 2004 23:58:00 -0000
In-Reply-To: <200408312246.PAA26407@hpsje.cup.hp.com> (Steve Ellcey's message
	of "Tue, 31 Aug 2004 15:46:47 -0700 (PDT)")
Message-ID: <87656y3m8i.fsf@codesourcery.com>
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Steve Ellcey <sje@cup.hp.com> writes:

> y.c: In function `foo':
> y.c:9: error: unrecognizable insn:
> (insn 36 19 37 0 (parallel [
>             (set (reg:SF 351)
>                 (div:SF (const_int 1 [0x1])
>                     (reg:SF 350 [ b ])))
>             (set (scratch:BI)
>                 (unspec:BI [
>                         (reg:SF 349 [ a ])
>                         (reg:SF 350 [ b ])
>                     ] 14))
>             (use (const_int 1 [0x1]))
>         ]) -1 (nil)
>     (expr_list:REG_UNUSED (scratch:BI)
>         (expr_list:REG_UNUSED (scratch:BI)
>             (nil))))
> y.c:9: internal compiler error: in extract_insn, at recog.c:2037

I'm fairly sure that your problem is with the "*recip_approx"
instruction, which is what is supposed to match this pattern.  The
catch is, it *only* allows XFmode operands, whereas you're trying to
feed it SFmode.

I'm not sure how to fix this.  When I tried to do something similar, I
got completely stuck because I couldn't make GCC refer to the *same*
pseudo register in two different modes.

zw