From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from crocodile.elm.relay.mailchannels.net (crocodile.elm.relay.mailchannels.net [23.83.212.45]) by sourceware.org (Postfix) with ESMTPS id 736283857BBF for ; Fri, 15 Jul 2022 18:41:28 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 736283857BBF X-Sender-Id: dreamhost|x-authsender|tuliom@ascii.art.br Received: from relay.mailchannels.net (localhost [127.0.0.1]) by relay.mailchannels.net (Postfix) with ESMTP id 736A4219EE; Fri, 15 Jul 2022 18:41:25 +0000 (UTC) Received: from pdx1-sub0-mail-a246.dreamhost.com (unknown [127.0.0.6]) (Authenticated sender: dreamhost) by relay.mailchannels.net (Postfix) with ESMTPA id BD4D52217A; Fri, 15 Jul 2022 18:41:24 +0000 (UTC) ARC-Seal: i=1; s=arc-2022; d=mailchannels.net; t=1657910484; a=rsa-sha256; cv=none; b=EBcjYoTM6hXatlaGUAIx1ry5imgOqZqXRotOUZ8+k7GGGXc22c7tb3H+YNCOmFl1KY0A1D Nh4CRPfB3ozqwJIGgj+PFaN1V966JSC3BE5H2jKimOcu4DHxbOhlUJHi/EdyCWDQs2V+pv DSF+D9u/T4ZR1tgcXW+AkrIdFU9W/mEfRa+nRIcJxueoZmTF7jC3cP0WbV/vOt5lQBNXI6 hgN6kvbizRr4soUh7BasIIXUVv8+F3FXey4mofKgkN6MWK/CzYprc9ootqi6yPFDV5CQ/H mn0dbvc0Qp/xRrFU6AXrKVqTOi1tL5Nf5AZJyJSXH3UMOY/jkd2TRTK1bBWWjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=mailchannels.net; s=arc-2022; t=1657910484; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references:dkim-signature; bh=ED6obg12CY1oAkiO3/rLi2wslJKUgZ6ZQENmt6aZyvY=; b=pGaquXJH4cqobBnYMY+hif9UfjeTGKjm0w+5HOj00j1Ia5hsQgrKi5OBBctlnK558Bs/MY zhVoLmnKlOCkCSpD8x3RvCqhs/fDmSi5/O3MtwrrELVsxuoaGSWKWDhvTIY+NHyxTQ1FpI HcKXZiildM8EAnUgXSlDoVxjpFLU70lPg81eY3A/7auwFivwwC475H9YKz7l/5bwGpNlEx KfbBDW2zEos8NigA9JsC1tCja4hJPOaXud1DLUphF63Jgwx+s8rx5Yw/aJN8HRB4nQjWRF mQFq19CoaqiJicjEA/XA3h9p2aui3LQ1Jar+St1Ro1jQvtZGNjaBjjh5Vgx2vg== ARC-Authentication-Results: i=1; rspamd-674ffb986c-9gs6p; auth=pass smtp.auth=dreamhost smtp.mailfrom=tuliom@ascii.art.br X-Sender-Id: dreamhost|x-authsender|tuliom@ascii.art.br X-MC-Relay: Neutral X-MailChannels-SenderId: dreamhost|x-authsender|tuliom@ascii.art.br X-MailChannels-Auth-Id: dreamhost X-Celery-Trail: 53bbd55f32c6593c_1657910485086_1369787043 X-MC-Loop-Signature: 1657910485086:3367164083 X-MC-Ingress-Time: 1657910485086 Received: from pdx1-sub0-mail-a246.dreamhost.com (pop.dreamhost.com [64.90.62.162]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384) by 100.115.18.78 (trex/6.7.1); Fri, 15 Jul 2022 18:41:25 +0000 Received: from ascii.art.br (unknown [138.121.65.190]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: tuliom@ascii.art.br) by pdx1-sub0-mail-a246.dreamhost.com (Postfix) with ESMTPSA id 4Ll0Yv6Z5qz2w; Fri, 15 Jul 2022 11:41:23 -0700 (PDT) From: Tulio Magno Quites Machado Filho To: Nicholas Piggin , linuxppc-dev@lists.ozlabs.org Cc: Florian Weimer , gcc@gcc.gnu.org, libc-alpha@sourceware.org, Nicholas Piggin , Paul E Murphy Subject: Re: [PATCH v2] powerpc: add documentation for HWCAPs In-Reply-To: <20220715012636.165948-1-npiggin@gmail.com> References: <20220715012636.165948-1-npiggin@gmail.com> User-Agent: Notmuch/0.36 (http://notmuchmail.org) Emacs/27.2 (x86_64-redhat-linux-gnu) Date: Fri, 15 Jul 2022 15:41:20 -0300 Message-ID: <877d4euskv.fsf@linux.ibm.com> MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-0.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, RCVD_IN_SBL_CSS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 15 Jul 2022 18:41:31 -0000 Nicholas Piggin writes: > +PPC_FEATURE_ARCH_2_05 > + The processor supports the v2.05 userlevel architecture. Processors > + supporting later architectures also set this feature. I don't think this bit is enabled when processors support later architectures. In my tests, this behavior started only with v2.06, i.e. processors that support v2.07 enable bit v2.06, but do not enable bit v2.05. Otherwise, looks good to me. -- Tulio Magno