MIPS GCC test failure: gcc.dg/tree-ssa/ssa-dom-thread-4.c

MIPS GCC test failure: gcc.dg/tree-ssa/ssa-dom-thread-4.c

[Steve Ellcey]

Jeff and Richard,

I was looking at the test failure of gcc.dg/tree-ssa/ssa-dom-thread-4.c
on MIPS.  The failure is in the scan of how many jumps are threaded
which has changed from 6 to 4 on MIPS.  I tracked down the change to
this patch:

2013-11-19  Jeff Law  <law@redhat.com>

        * tree-ssa-threadedge.c (thread_across_edge): After threading
        through a joiner, allow threading a normal block requiring
        duplication.

        * tree-ssa-threadupdate.c (thread_block_1): Improve code to detect
        jump threading requests that would muck up the loop structures.

        * tree-ssa-threadupdate.c: Fix trailing whitespace.
        * tree-ssa-threadupdate.h: Likewise.

Now my initial thought is to just change the mips scan to look for
4 'Threaded' lines instead of 6 and be done with it, but the test has
a long explanation of why 6 is the right answer on MIPS and I don't know
what to do with this.  Even after looking at the new and old dom1 dump
files I can't really explain why 4 is the right number now instead of 6.

I am not sure if this is broken on arc or avr now either, I didn't see
any test results from these platforms in gcc-testsuite mailing list
so I am not sure if they were affected or not.

I also noticed that while the dom1 dump is different the final code
generation for MIPS has not changed for this test.

So my question is, can either of you help me with the MIPS explanation
of why 4 is the right number now and/or can I just remove the explanation
and change the MIPS scan?  Should I leave avr and arc alone (split them
off from mips) since I have no evidence that they are failing?

Steve Ellcey
sellcey@mips.com

Re: MIPS GCC test failure: gcc.dg/tree-ssa/ssa-dom-thread-4.c

[Richard Sandiford]

"Steve Ellcey " <sellcey@mips.com> writes:
> I was looking at the test failure of gcc.dg/tree-ssa/ssa-dom-thread-4.c
> on MIPS.  The failure is in the scan of how many jumps are threaded
> which has changed from 6 to 4 on MIPS.

Yeah, I'd been leaving this one until I could devote a bit of time to it.

> I tracked down the change to this patch:
>
> 2013-11-19  Jeff Law  <law@redhat.com>
>
>         * tree-ssa-threadedge.c (thread_across_edge): After threading
>         through a joiner, allow threading a normal block requiring
>         duplication.
>
>         * tree-ssa-threadupdate.c (thread_block_1): Improve code to detect
>         jump threading requests that would muck up the loop structures.
>
>         * tree-ssa-threadupdate.c: Fix trailing whitespace.
>         * tree-ssa-threadupdate.h: Likewise.

Thanks for tracking down the patch that changed it.

> Now my initial thought is to just change the mips scan to look for
> 4 'Threaded' lines instead of 6 and be done with it, but the test has
> a long explanation of why 6 is the right answer on MIPS and I don't know
> what to do with this.  Even after looking at the new and old dom1 dump
> files I can't really explain why 4 is the right number now instead of 6.

It's because the earlier vrp1 pass is now doing the !kill_elt ->
continuation point threading (the third item from the list).
vrp1 runs before the header of the inner while loop is duplicated,
so here the transformation only happens once rather than twice.

vrp1 is now also duplicating the b_elt-testing block in:

      if (b_elt && kill_elt && kill_elt->indx == b_elt->indx
          ...

for the "kill_elt->indx >= b_elt->indx" branch of the while loop
so that it can thread out the known-true kill_elt test.  I.e.,
if the while loop stops on "kill_elt->indx >= b_elt->indx",
the if statement will test:

      if (b_elt && kill_elt->indx == b_elt->indx
          ...

But it's still down to dom1 to recognise that the b_elt test itself is
also redundant in this case, so the fourth item on the list still holds.

I applied this patch to update the MIPS results after checking
that it also works for arc-elf and avr-elf.

Thanks,
Richard


gcc/testsuite/
	* gcc.dg/tree-ssa/ssa-dom-thread-4.c: Adjust expected MIPS output.

Index: gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c
===================================================================
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c	2014-02-01 11:37:12.793270725 +0000
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c	2014-02-01 11:37:13.021272556 +0000
@@ -66,7 +66,7 @@ bitmap_ior_and_compl (bitmap dst, const_
    "a_elt || b_elt" and "b_elt && kill_elt" into two conditions each,
    rather than using "(var1 != 0) op (var2 != 0)".  Also, as on other targets,
    we duplicate the header of the inner "while" loop.  There are then
-   6 threading opportunities:
+   4 threading opportunities:
 
    1x "!a_elt && b_elt" in the outer "while" loop
       -> the start of the inner "while" loop,
@@ -74,16 +74,13 @@ bitmap_ior_and_compl (bitmap dst, const_
    1x "!b_elt" in the first condition
       -> the outer "while" loop's continuation point,
 	 skipping the known-false "b_elt" in the second condition.
-   2x "!kill_elt" in the inner "while" loop
-      -> the outer "while" loop's continuation point,
-	 skipping the known-false "b_elt && kill_elt" in the second condition
-   2x "kill_elt->indx < b_elt->indx" in the first "while" loop
+   2x "kill_elt->indx >= b_elt->indx" in the first "while" loop
       -> "kill_elt->indx == b_elt->indx" in the second condition,
 	 skipping the known-true "b_elt && kill_elt" in the second
 	 condition.  */
 /* Likewise for arc.  */
 /* For avr, BRANCH_COST is by default 0, so the default
    LOGICAL_OP_NON_SHORT_CIRCUIT definition also computes as 0.  */
-/* { dg-final { scan-tree-dump-times "Threaded" 6 "dom1" { target mips*-*-* avr-*-* arc*-*-* } } } */
+/* { dg-final { scan-tree-dump-times "Threaded" 4 "dom1" { target mips*-*-* avr-*-* arc*-*-* } } } */
 /* { dg-final { cleanup-tree-dump "dom1" } } */