From: Senthil Kumar Selvaraj <senthil.thecoder@gmail.com>
To: gcc@gcc.gnu.org
Cc: ebotcazou@adacore.com,law@redhat.com
Subject: Clobber REG_CC only for some constraint alternatives?
Date: Fri, 14 Aug 2020 16:46:59 +0530 [thread overview]
Message-ID: <87o8nd1npw.fsf@gcc.gnu.org> (raw)
Hi,
I'm working on porting AVR to MODE_CC, and there are quite a few
patterns that clobber the condition code reg only for certain
constraint alternatives. For e.g.,
(define_insn "mov<mode>_insn"
[(set (match_operand:ALL1 0 "nonimmediate_operand" "=r ,d ,Qm ,r ,q,r,*r")
(match_operand:ALL1 1 "nox_general_operand" "r Y00,n Ynn,r Y00,Qm,r,q,i"))]
"register_operand (operands[0], <MODE>mode)
|| reg_or_0_operand (operands[1], <MODE>mode)"
{
return output_movqi (insn, operands, NULL);
}
[(set_attr "length" "1,1,5,5,1,1,4")
(set_attr "adjust_len" "mov8")
(set_attr "cc" "ldi,none,clobber,clobber,none,none,clobber")])
As you can deduce from the (set_attr "cc" ..), only constraint
alternatives 0,2,3 and 6 clobber CC - others leave it unchanged.
My first version of the port adds a post-reload splitter that adds a
(clobber (reg:CC REG_CC)) unconditionally, and it appears to work. If I
do want to add the clobber conditionally, would something like the below
be a good way to do it (get_cc_reg_clobber_rtx returns either const0_rtx
or cc_reg_rtx based on get_attr_cc (insn))? Or is there a better/cleaner way?
(define_insn_and_split "mov<mode>_insn"
[(set (match_operand:ALL1 0 "nonimmediate_operand" "=r ,d ,Qm ,r ,q,r,*r")
(match_operand:ALL1 1 "nox_general_operand" "r Y00,n Ynn,r Y00,Qm,r,q,i"))]
"register_operand (operands[0], <MODE>mode)
|| reg_or_0_operand (operands[1], <MODE>mode)"
"#"
"&& reload_completed"
[(parallel [(set (match_dup 0)
(match_dup 1))
(clobber (match_dup 2))])]
{
operands[2] = get_cc_reg_clobber_rtx (curr_insn);
}
[(set_attr "cc" "ldi,none,clobber,clobber,none,none,clobber")])
(define_insn "*mov<mode>_insn_clobber_flags"
[(set (match_operand:ALL1 0 "nonimmediate_operand" "=r ,Qm ,r ,*r")
(match_operand:ALL1 1 "nox_general_operand" "r Y00,r Y00,Qm,i"))
(clobber (reg:CC REG_CC))]
"(register_operand (operands[0], <MODE>mode)
|| reg_or_0_operand (operands[1], <MODE>mode))
&& reload_completed"
{
return output_movqi (insn, operands, NULL);
}
[(set_attr "length" "1,5,5,4")
(set_attr "adjust_len" "mov8")])
(define_insn "*mov<mode>_insn_noclobber_flags"
[(set (match_operand:ALL1 0 "nonimmediate_operand" "=r,d ,q,r")
(match_operand:ALL1 1 "nox_general_operand" "r,n Ynn,r,q"))
(clobber (const_int 0))]
"(register_operand (operands[0], <MODE>mode)
|| reg_or_0_operand (operands[1], <MODE>mode))
&& reload_completed"
{
return output_movqi (insn, operands, NULL);
}
[(set_attr "length" "1,1,1,1")
(set_attr "adjust_len" "mov8")])
Regards
Senthil
next reply other threads:[~2020-08-14 11:17 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-14 11:16 Senthil Kumar Selvaraj [this message]
2020-08-14 15:32 ` Matt Wette
2020-08-14 17:42 ` Pip Cet
2020-08-14 16:23 ` Segher Boessenkool
2020-08-14 17:47 ` Pip Cet
2020-08-15 0:29 ` Segher Boessenkool
2020-08-15 10:18 ` Pip Cet
2020-08-16 0:50 ` Segher Boessenkool
2020-08-16 18:28 ` Pip Cet
2020-08-17 7:31 ` Senthil Kumar Selvaraj
2020-08-17 9:18 ` Pip Cet
2020-08-18 6:52 ` Senthil Kumar Selvaraj
2020-08-20 11:51 ` Pip Cet
2020-08-20 16:06 ` Senthil Kumar Selvaraj
2020-08-24 18:18 ` Jeff Law
2020-08-26 3:58 ` Hans-Peter Nilsson
2020-08-26 16:20 ` Jeff Law
2020-08-26 18:26 ` Hans-Peter Nilsson
2020-08-26 11:18 ` Pip Cet
2020-08-26 16:21 ` Jeff Law
[not found] ` <87h7so2w0c.fsf@gcc.gnu.org>
2020-08-27 14:48 ` Jeff Law
2020-09-01 19:38 ` Hans-Peter Nilsson
2020-08-17 17:21 ` Segher Boessenkool
2020-08-18 15:17 ` Hans-Peter Nilsson
2020-08-16 3:25 ` Hans-Peter Nilsson
2020-08-19 5:57 ` Senthil Kumar Selvaraj
2020-08-19 22:31 ` Hans-Peter Nilsson
2020-08-20 5:40 ` Senthil Kumar Selvaraj
2020-08-20 8:51 ` Andrew Stubbs
2020-08-20 10:59 ` H.J. Lu
2020-08-20 16:53 ` Hans-Peter Nilsson
2020-08-17 16:45 ` Jeff Law
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