From: Richard Sandiford <rsandifo@redhat.com>
To: Steve Ellcey <sje@cup.hp.com>
Cc: gcc@gcc.gnu.org
Subject: Re: RFC: Using mode and code macros in *.md files
Date: Tue, 31 Aug 2004 18:37:00 -0000 [thread overview]
Message-ID: <87r7pnw45v.fsf@redhat.com> (raw)
In-Reply-To: <200408311757.KAA07412@hpsje.cup.hp.com> (Steve Ellcey's message of "Tue, 31 Aug 2004 10:57:41 -0700 (PDT)")
Steve Ellcey <sje@cup.hp.com> writes:
> On IA64, extending a floating point operand in a register is a noop so
> it would be useful to fold that into actual floating point operations.
>
> So if I had something like:
>
> ;; AF == Any floating point type that can fit in a register.
> (define_mode_macro AF [(SF "") (DF "") (XF "")])
>
> (define_insn "*addxf3_extend"
> [(set (match_operand:XF 0 "fr_register_operand" "=f")
> (plus:XF (float_extend:XF
> (match_operand:AF 1 "fr_register_operand" "%f"))
> (float_extend:XF
> (match_operand:AF 2 "fr_reg_or_fp01_operand" "fG"))))]
> ""
> "fadd %0 = %1, %F2"
> [(set_attr "itanium_class" "fmac")])
>
> Am I right in assuming that this would allow two SF operands, two DF
> operands or two XF operands but would not allow, say, one SF operand and
> one DF operand?
'Fraid so.
> Could I work around that by defining AF1 and AF2 with the same
> definition as AF and then using AF1 and AF2 in the instruction instead
> of using AF twice?
That should certainly do the trick. (Do you really want to
include XF though? I'm not sure whether it's OK to have
(float_extend:XF (reg:XF ...)).)
> It would be nice if I could fold the version of addxf3 that has no
> float_extend's into this definition too but I don't think any macros or
> existing mechanism would allow me to do that.
Yeah, I know the feeling ;) It would be nice to do the same thing
on MIPS with SI->DI sign_extends.
I did have one proposal for that:
http://gcc.gnu.org/ml/gcc/2004-07/msg01126.html
but it didn't seem to take the world by storm ;) It also doesn't
help when the extension isn't wrapping a matchd_operator. I.e. it
wouldn't help to reduce the duplication between:
(set (match_operand:DI ...)
(sign_extend:DI (plus:SI (match_operand:SI ...)
(match_operand:SI ...))))
and:
(set (match_operand:SI ...)
(plus:SI (match_operand:SI ...)
(match_operand:SI ...)))
which are the same thing on MIPS[*]. It would also run into problems
if the constraints allow constants, since you might end up reloading:
(sign_extend:DI (reg:SI psuedo-equivalent-to-const))
to:
(sign_extend:DI (const_int ...))
and that would be bad.
It would certainly be nice to have a clean way of dealing with this...
Richard
[*] We could probably handle that using match_operator though.
next prev parent reply other threads:[~2004-08-31 18:33 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-08-07 18:38 Richard Sandiford
2004-08-08 4:30 ` James E Wilson
2004-08-08 8:43 ` Richard Sandiford
2004-08-09 18:29 ` James E Wilson
2004-08-09 9:02 ` Michael Matz
2004-08-09 18:09 ` James E Wilson
2004-08-10 8:57 ` Segher Boessenkool
2004-08-23 10:32 ` Zack Weinberg
2004-08-26 21:08 ` Richard Sandiford
2004-08-31 18:19 ` Steve Ellcey
2004-08-31 18:37 ` Richard Sandiford [this message]
2004-08-31 19:27 ` Joern Rennecke
2004-08-31 21:04 ` Steve Ellcey
2004-09-01 12:20 ` Joern Rennecke
2004-09-01 18:33 ` Steve Ellcey
2004-09-01 19:00 ` James E Wilson
2004-09-02 10:37 ` Joern Rennecke
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