* gcc backend general question
@ 2002-11-01 14:42 Spundun
2002-11-01 15:04 ` Falk Hueffner
0 siblings, 1 reply; 2+ messages in thread
From: Spundun @ 2002-11-01 14:42 UTC (permalink / raw)
To: gcc
Hi
I am trying to configure gcc backend for a new architecture. This
architecture has only 32bit memory references, so for QI and HI moves I
have to do masking and shifting....
I was wondering if there exist such a configuration fo r some other
architecture which I could study.
i.e. Is there an architecture in gcc/config where 1 byte and 2 byte
memory accesses are performed using SI(4byte) moves?
Thanx
Spundun
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: gcc backend general question
2002-11-01 14:42 gcc backend general question Spundun
@ 2002-11-01 15:04 ` Falk Hueffner
0 siblings, 0 replies; 2+ messages in thread
From: Falk Hueffner @ 2002-11-01 15:04 UTC (permalink / raw)
To: Spundun; +Cc: gcc
Spundun <spundun@ISI.EDU> writes:
> i.e. Is there an architecture in gcc/config where 1 byte and 2 byte
> memory accesses are performed using SI(4byte) moves?
Alpha without TARGET_BWX.
--
Falk
^ permalink raw reply [flat|nested] 2+ messages in thread
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2002-11-01 14:42 gcc backend general question Spundun
2002-11-01 15:04 ` Falk Hueffner
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