From mboxrd@z Thu Jan  1 00:00:00 1970
To: egcs@cygnus.com
Subject: No Subject
Date: Fri, 30 Apr 1999 23:15:00 -0000
Message-id: <9600.950506761.6@NO-ID-FOUND.mhonarc.org>
X-SW-Source: 1999-04n/msg00918.html

> 2) number of bits set

Can be done using gcc inline assembly (on most CPUs that implement
the "NSA instruction" with a single opcode) 

> 3) bit rotation

Dito. 

e.g. on the x86:

extern inline unsigned int rotate_left(int i, unsigned int word)
{
	asm("roll %%cl,%0"
		:"=r" (word)
		:"0" (word),"c" (i));
	return word;
}

> this could be done in the optimizer but would be hard to identify afaik...

gcc tries to spot some of the constructs used to simulate rotation
in C ((x<<i) | (x>>(wordsize-i))) and output it as a single rotate
instruction, but this seems to only work for constant rotate counts.


-Andi

-- 
This is like TV. I don't like TV.