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From: David Edelsohn <dje@watson.ibm.com>
To: law@cygnus.com
Cc: "Lassi A. Tuura" <Lassi.Tuura@cern.ch>, egcs@cygnus.com
Subject: Re: config.guess/config.sub improvements
Date: Wed, 28 Jan 1998 15:03:00 -0000	[thread overview]
Message-ID: <9801281935.AA27184@rios1.watson.ibm.com> (raw)
In-Reply-To: <9273.885968525@hurl.cygnus.com>

>>>>> Jeffrey A Law writes:

>> * On LynxOS, both RS6000 and PowerPC variants are folded to rs6000-*.
>> I know the processors are supposedly similar, but are they really
>> that similar?  For all that I know, people here are using PPC
>> boards running LynxOS, and so far I have used powerpc-* as the
>> configuration string.  I can rename things to rs6000-* if that
>> is known to work.  And yes, I have absolutely no clue about this
>> platform otherwise---I just need to support gcc on it.

Jeff> Yes, they are basically the same -- they share a common instrution set
Jeff> which the compiler uses by default.  And each rs6000/ppc variant has a
Jeff> few instructions of its own, a different pipeline, etc.

	This depends on what LynxOS does under the covers.  For the
various non-embedded Unix variants other than AIX (e.g., Linux, NetBSD),
only PowerPC is supported.  Lynx seems to be utilizing much of the AIX
base and has supported the original POWER architecture.  The PowerPC
version of AIX emulates the trapped POWER instructions; I do not know what
Lynx does.  The architecture is fully configurable at compile time, so the
builtin defaults are somewhat irrelevant.  Using the proper architecture
is important for performance.

	PowerPC made few user-visible changes to the basic POWER
archtecture structure: instructions with implicit output registers were
replaced (e.g., 64-bit multiply output used MQ register), instructions
requiring late decisions in the pipeline were removed (e.g., doz), and a
full-compliment of single-precision floating-point instructions were
added.

	The PowerPC architecture defines two groups of optional
instructions.  Any implementation can choose to include them, but they are
well-defined sets of instructions, not ad hoc instructions included per
chip.

David

  reply	other threads:[~1998-01-28 15:03 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <346207C2.74FF2820@cern.ch>
1998-01-23 11:15 ` Jeffrey A Law
1998-01-27 13:20   ` Lassi A. Tuura
1998-01-27 16:18     ` Ian Lance Taylor
1998-01-28  0:50       ` Lassi A. Tuura
1998-01-27 22:20     ` Jeffrey A Law
1998-01-28 15:03       ` David Edelsohn [this message]
1998-01-29  0:41         ` Lassi A. Tuura
1998-01-29 14:41           ` David Edelsohn
1997-11-13  5:17 Lassi A. Tuura

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