From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qt1-x82d.google.com (mail-qt1-x82d.google.com [IPv6:2607:f8b0:4864:20::82d]) by sourceware.org (Postfix) with ESMTPS id F0F76386F032 for ; Tue, 12 Jan 2021 15:29:11 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org F0F76386F032 Received: by mail-qt1-x82d.google.com with SMTP id c1so1768478qtc.1 for ; Tue, 12 Jan 2021 07:29:11 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=EeWAGcKXlh345YdI4wsRtuSmXBg42Id2C9jNYRCkLQo=; b=f4DRe3UwKMq/ehODF4Wpah1dpi2N7r00QKyRmRIagZ5cvw6RkzkKKJJQdiYjaAq/rz SWkux3Y7uyJopaqIW8Ujl7QaKeMReHNHfbri0ZpL4TXoOGaY4flfze/qUA94ZXOUEwMp RNRgORQ5cuOOgZV5tUK00679en8KsQP4zYHEM0NsPbEBeTWkAmfQb4SWFLfLi9Y0TouJ EJN34tjbps213VeHWzjtt4XbqnbP/nsxQVZ04OriPo/nfSvLhlOJIfq6/VB407HgJF3u 9pbf2GmvfJoWOsnM0TEoNdg7JRTgWT07j79RSJDwwnzyPXZtcrQOQRbkqSj4h/zsc3Q0 TRQg== X-Gm-Message-State: AOAM533PFBLwfURWc6mBzX30RhJsV2O+c93b+FZx8bvWoW2isom53xRS K+qr3n2u83wb8w4fgEn2fSmRxg7JyOpCO1pbQVY= X-Google-Smtp-Source: ABdhPJxtqun3GK46QOYMc/3D1yL7wggSCJzgggg7AZHncKqePhVRyr0rGXeNVIoZX4IBQuAb3/TLapKwE42kg3wHeKQ= X-Received: by 2002:ac8:76da:: with SMTP id q26mr5086607qtr.169.1610465351578; Tue, 12 Jan 2021 07:29:11 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: Tucker Kern Date: Tue, 12 Jan 2021 08:28:59 -0700 Message-ID: Subject: Re: Adjust offset of array reference in named address space To: Richard Biener Cc: Tucker Kern via Gcc X-Spam-Status: No, score=-3.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, HTML_MESSAGE, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org Content-Type: text/plain; charset="UTF-8" X-Content-Filtered-By: Mailman/MimeDel 2.1.29 X-BeenThere: gcc@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 12 Jan 2021 15:29:13 -0000 > So you are saying that a 16bit data word in IMEM is actually two 12bit > data words (supposedly only the lower 8 bits used in each) and thus the > array contains "padding"? Effectively yes. The assembler handles dividing constants into their LSB and MSB components. I have insn patterns and splitters defined that emit the correct instructions to read and "pack" the value into a register or generic memory location. All I really need at this point is a means to augment how addresses (e.g. array offsets or struct members) are calculated in a non-generic address space. This doesn't feel like a far fetched idea as GCC currently supports address space specific legitimization and modes. On Mon, Jan 11, 2021 at 12:50 AM Richard Biener wrote: > On Sat, Jan 9, 2021 at 12:24 AM Tucker Kern via Gcc > wrote: > > > > Hi, > > > > I'm implementing named addresses spaces for a Harvard architecture > machine > > to support copying data from instruction memory to data memory. This is > > achieved via a special instruction. e.g. think AVR and progmem/__flash. > > > > However, the instruction memory is narrower than the data memory (12 vs > 16 > > bits) on this machine. So a single data word is split across 2 > instruction > > words. When copied from IMEM to DMEM the two parts are combined via > SHIFT + > > OR patterns. > > > > This is all working fine for regular variables (i.e. int som_var), but it > > falls apart for array references (i.e. some_array[1]). Since the data is > > stored across 2 IMEM words, I need to scale the calculated offset of each > > array reference by 2. e.g. array[0] is actually stored in imem[0] & > imem[1] > > and array[1] is stored in imem[2] & imem[3]. > > So you are saying that a 16bit data word in IMEM is actually two 12bit > data words (supposedly only the lower 8 bits used in each) and thus the > array contains "padding"? That's not really supported and is also not > the scope of named address spaces. I'd suggest you go down the route > of providing intrinsics for the transfer of data instead which could resort > to target specific builtin functions. > > > e.g. > > static __imem int imem_array[2]; > > return imem_array[1]; > > > > // needs to generate a symbol reference like > > &imem_array.869+2 > > > > Similarly if the array index was a function parameter, I need to scale > the > > parameter by 2. > > __imem int imem_array[2]; > > int some_func(int a) > > { > > // a needs to be scaled by 2 when generating RTL/ASM > > return imem_array[a]; > > } > > > > I haven't found any target hooks that would allow me to override the > offset > > calculation. Originally I thought I could handle it in a splitter but > this > > approach didn't work for the function parameter example as I ended up > > scaling the entire address instead of just the offset. > > > > I had another thought of using a combo of > > TARGET_ADDR_SPACE_LEGITIMIZE_ADDRESS and > > TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P to scale the offset and mark it as > > adjusted but I don't think this combo will work in the end. > > > > Is there any way to achieve this? > > > > Thanks, > > Tucker >