From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 70318 invoked by alias); 11 Jul 2018 16:18:23 -0000 Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org Received: (qmail 70307 invoked by uid 89); 11 Jul 2018 16:18:22 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: =?ISO-8859-1?Q?No, score=-6.5 required=5.0 tests=AWL,BAYES_00,FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,GIT_PATCH_2,HTML_MESSAGE,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy=HX-Received:sk:b9-v6mr, cced, noticed=c2, H*i:CAGfacvR?= X-HELO: mail-pf0-f170.google.com Received: from mail-pf0-f170.google.com (HELO mail-pf0-f170.google.com) (209.85.192.170) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 11 Jul 2018 16:18:20 +0000 Received: by mail-pf0-f170.google.com with SMTP id y8-v6so18729425pfm.10 for ; Wed, 11 Jul 2018 09:18:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=6t9bC3ATFrfIA4xqI14YVh2vBIdVUEEpie6NWBK/nio=; b=hFhmnEoKtp0ofSU4e56gGb0+VZeHLgtVHmIuX4YYYImrtT2JVcQeqNZHAb3nn0RJrZ c+6UlTyYANaVgbk15gypbBoLcfDXT5IyPmg+i5qwtNS748kClc4RY3TeNgzJ1VrF2GnI 98SqGNPeiWY+B4QzSogN7kq2svkjt9u+3CU0QWLFETZj/KfqDNrGIxn2sFLRDUjU6Cz9 GvpwUfu86SXh28yyGtGYAEQ8aJNYgj4WJnA4apXInwAIIH5jeM4L6a3BA89vh5JJxpK1 WbJ+PwbUO+y0QM69y1FFuinkE5YiU7FNt/HWEspy8oHDmgmI5k7WzvwANnioNAA5q/DZ dQaw== MIME-Version: 1.0 References: In-Reply-To: From: Umesh Kalappa Date: Wed, 11 Jul 2018 16:18:00 -0000 Message-ID: Subject: Fwd: GCC 8.1 :Store Merge pass issue (-fstore-merging). To: gcc@gcc.gnu.org Cc: Kyrill Tkachov Content-Type: text/plain; charset="UTF-8" X-IsSubscribed: yes X-SW-Source: 2018-07/txt/msg00180.txt.bz2 Cc'ed Kyrill. ---------- Forwarded message --------- From: Umesh Kalappa Date: Wed, Jul 11, 2018, 7:37 PM Subject: GCC 8.1 :Store Merge pass issue (-fstore-merging). To: Hi Everyone , We have the below case ,where store marge pass doing the invalid optimization (thats our observations on powerpc ) ,i.e C case : typedef unsigned int UINT32; typedef union { UINT32 regVal; struct { UINT32 mask:1; UINT32 a:1; UINT32 :6; UINT32 p:1; UINT32 s:1; UINT32 :2; UINT32 priority:4; UINT32 vector:16; } field; } MPIC_IVPR; UINT32 test(UINT32 vector) { MPIC_IVPR mpicIvpr; mpicIvpr.regVal = 0; mpicIvpr.field.vector = vector; mpicIvpr.field.priority = 0xe; return mpicIvpr.regVal; } gcc -O2 -S test.c ... lis 3,0xe ;; mpicIvpr.field.priority = 15 blr ... the store dump as Processing basic block <2>: Starting new chain with statement: mpicIvpr.regVal = 0; The base object is: &mpicIvpr Recording immediate store from stmt: mpicIvpr.field.vector = _1; Recording immediate store from stmt: mpicIvpr.field.priority = 14; stmt causes chain termination: _7 = mpicIvpr.regVal; Attempting to coalesce 3 stores in chain. Store 0: bitsize:32 bitpos:0 val: 0 ------------ Store 1: bitsize:4 bitpos:12 val: 14 ------------ Store 2: bitsize:16 bitpos:16 val: _1 ------------ After writing 0 of size 32 at position 0 the merged region contains: 0 0 0 0 0 0 0 0 After writing 14 of size 4 at position 12 the merged region contains: 0 e 0 0 0 0 0 0 Coalescing successful! Merged into 1 stores New sequence of 1 stmts to replace old one of 2 stmts # .MEM_6 = VDEF <.MEM_5> MEM[(union *)&mpicIvpr] = 917504; Merging successful! Volatile access terminates all chains test (UINT32 vector) { union MPIC_IVPR mpicIvpr; short unsigned int _1; UINT32 _7; [local count: 1073741825]: _1 = (short unsigned int) vector_4(D); mpicIvpr.field.vector = _1; MEM[(union *)&mpicIvpr] = 917504; _7 = mpicIvpr.regVal; mpicIvpr ={v} {CLOBBER}; return _7; } As noticed from dump ,the store of .regVal and priority is folded to single store ,since the rhs operand is constant in both stmts by leaving the above cfg and making mpicIvpr.field.vector = _1 stmt as dead code,hence latter DCE deletes the same ,which results with the incorrect asm as show above and we are in process of debugging the store merge pass and we see that " mpicIvpr.field.vector = _1; " should clobber the first store "mpicIvpr.regVal = 0;" in the merge store vector ,but its not clobbering ,by disabling the handling the overlapping store ,the above case works , i.e if(0) { /* |---store 1---| |---store 2---| Overlapping stores. */ if (IN_RANGE (info->bitpos, merged_store->start, merged_store->start + merged_store->width - 1)) { if (info->rhs_code == INTEGER_CST && merged_store->stores[0]->rhs_code == INTEGER_CST) { merged_store->merge_overlapping (info); continue; } } } before we conclude on the same ,we would like to hear any comments from community ,which helps us to resolve the issue and by disabling the store merge pass as expected the above case works . Thank you. and looking for any suggestions on the same. ~Umesh