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From: Kirill Yukhin <kirill.yukhin@gmail.com>
To: Ian Lance Taylor <iant@google.com>,
	Uros Bizjak <ubizjak@gmail.com>, "H.J. Lu" <hjl.tools@gmail.com>
Cc: gcc@gcc.gnu.org
Subject: Re: Defining constraint for registers tuple
Date: Tue, 16 Aug 2011 11:20:00 -0000	[thread overview]
Message-ID: <CAGs3Rfs0QgY4R84mSSp4Z4xND4urz_YvDyxU8=VjBEi+3i7zjA@mail.gmail.com> (raw)
In-Reply-To: <CAGs3RfuPns2vmUW5FbWYptj2QH6dhBxrpi-w0OT7LajWk+rJvw@mail.gmail.com>

Hi guys,
the question is still opened. Let me try to explain further.

The new MULX instruction is capable to store result of unsigned
multiply to arbitrary pair of GPRs (one of operands still must be DX).
But I have no idea, how to implement such a constraint.
Here is define_insn which is works but uses i386's "A" constraint. It
is much worse than using any pair of registers.
(define_insn "*bmi2_mulx<mode><dwi>3"
  [(set (match_operand:<DWI> 0 "register_operand" "=A")
        (mult:<DWI>
          (zero_extend:<DWI>
            (match_operand:DWIH 1 "nonimmediate_operand" "d"))
          (zero_extend:<DWI>
            (match_operand:DWIH 2 "nonimmediate_operand" "rm"))))]
 "TARGET_BMI2 && !(MEM_P (operands[1]) && MEM_P (operands[2]))"
  "mulx\t%2, %%eax, %%edx"
  [(set_attr "type" "imul")
   (set_attr "length_immediate" "0")
   (set_attr "mode" "<MODE>")])

Maybe there is examples from other ports? Any help is appreciated

Thanks, K



On Mon, Aug 1, 2011 at 4:28 PM, Kirill Yukhin <kirill.yukhin@gmail.com> wrote:
>> Don't change the constraint, just add an alternative.  Or use a
>> different insn with an insn predicate.
>
> This is misunderstanding beacuse of my great English :)
>
> I am not going to update existing constraint. I am going to implement new one.
> Actually, I am looking for some expample, where similar constraint
> might be implemented already.
>
> --
> Thanks, K
>

  reply	other threads:[~2011-08-16 11:20 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-07-29 10:56 Kirill Yukhin
2011-07-29 14:55 ` Ian Lance Taylor
2011-08-01 12:28   ` Kirill Yukhin
2011-08-16 11:20     ` Kirill Yukhin [this message]
2011-08-16 14:58       ` Richard Henderson
2011-08-16 17:32         ` Kirill Yukhin

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