From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 26588 invoked by alias); 13 Feb 2014 15:37:34 -0000 Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org Received: (qmail 26556 invoked by uid 89); 13 Feb 2014 15:37:33 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.4 required=5.0 tests=BAYES_00,FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-la0-f52.google.com Received: from mail-la0-f52.google.com (HELO mail-la0-f52.google.com) (209.85.215.52) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Thu, 13 Feb 2014 15:37:30 +0000 Received: by mail-la0-f52.google.com with SMTP id c6so8422956lan.11 for ; Thu, 13 Feb 2014 07:37:27 -0800 (PST) MIME-Version: 1.0 X-Received: by 10.152.120.201 with SMTP id le9mr92851lab.68.1392305847118; Thu, 13 Feb 2014 07:37:27 -0800 (PST) Received: by 10.114.186.35 with HTTP; Thu, 13 Feb 2014 07:37:27 -0800 (PST) In-Reply-To: <52FCD786.1040407@arm.com> References: <52FCD786.1040407@arm.com> Date: Thu, 13 Feb 2014 15:37:00 -0000 Message-ID: Subject: Re: Aarch64 implementation for dwarf exception handling From: Shiva Chen To: Renlin Li , yufeng.zhang.uk@googlemail.com Cc: "gcc@gcc.gnu.org" Content-Type: text/plain; charset=ISO-8859-1 X-IsSubscribed: yes X-SW-Source: 2014-02/txt/msg00186.txt.bz2 Hi, Yufeng Sorry, I don't have any testcase I just mis-understanding the implementation. Hi, Renlin Thanks to point out my mis-understanding. I didn't aware that LP would in different position between FP needed (bottom of callee) and FP not needed(top of callee). I have check the aarch64_layout_frame() and find out the FP/LP will push as last register by aarch64_save_or_restore_callee_save_registers () if FP is not needed. Thanks for your kindly help, I really appreciate it. Shiva 2014-02-13 22:32 GMT+08:00 Renlin Li : > On 13/02/14 02:14, Shiva Chen wrote: >> >> Hi, >> >> I have a question about the implementation of >> >> aarch64_final_eh_return_addr >> >> which is used to point out the return address of the frame >> >> According the source code >> >> If FP is not needed >> >> return gen_frame_mem (DImode, >> plus_constant (Pmode, >> stack_pointer_rtx, >> fp_offset >> + >> cfun->machine->frame.saved_regs_size >> - 2 * UNITS_PER_WORD)); >> >> >> According the frame layout >> >> +-------------------------------+ <-- arg_pointer_rtx >> | >> | callee-allocated save area >> | for register varargs >> | >> +-------------------------------+ >> | >> | local variables >> | >> +-------------------------------+ <-- frame_pointer_rtx >> | >> | callee-saved registers >> | >> +-------------------------------+ >> | LR' >> +-------------------------------+ >> | FP' >> P+-------------------------------+ <-- hard_frame_pointer_rtx >> | dynamic allocation >> +-------------------------------+ >> | >> | outgoing stack arguments >> | >> +-------------------------------+ <-- stack_pointer_rtx >> >> Shouldn't the return value be >> >> return gen_frame_mem (DImode, >> plus_constant (Pmode, >> stack_pointer_rtx, >> fp_offset >> + 2* UNITS_PER_WORD)); >> >> Or I just mis-understanding something ? >> >> >> Hope someone could give me a tip. >> >> It would be very helpful. >> >> Thanks >> >> Shiva Chen >> > Hi, > > If frame pointer is not needed. The prologue routine will store the callee > saved registers to stack according to ascending order, which means X0 will > be saved first if needed, and X30(LR) will be the last if it's pushed into > stack. > > Please check the source code, aarch64_layout_frame(). > > As the comment above the code also indicates, LR would be at the top of the > saved registers block(). > > By the way, there is one additional stack slot might be needed to keep stack > pointer 16-byte aligned, so - 2 * UNITS_PER_WORD is needed to adjust the > load address. > > +-------------------------------+ <-- arg_pointer_rtx > | > +-------------------------------+ <-- frame_pointer_rtx > | dummy > | LR > | bla...bla... > | x3 > | x2 > | x1 > | x0 > P +-------------------------------+ <-- hard_frame_pointer_rtx > | > +-------------------------------+ <-- stack_pointer_rtx > > > Kind regards, > Renlin >