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* assemble code and disassembled code in-consistency
@ 2012-07-06 16:27 Feng LI
  2012-07-06 16:48 ` H.J. Lu
  2012-07-06 17:08 ` H.J. Lu
  0 siblings, 2 replies; 4+ messages in thread
From: Feng LI @ 2012-07-06 16:27 UTC (permalink / raw)
  To: GCC

Hi folks,

I have a backend hook (x86_64) for builtin function expansion, so
I have this:

expand_simple_binop (DImode, ASHIFT, op0,
                                GEN_INT (32),op0,1,OPTAB_DIRECT);

to generate op0 = op0<<32 (op0 is the first argument of this builtin
function, with type SIZE_T)

The thing goes well in the assemble code, where I got:
        movq    104(%rbx), %rax
        salq    $32, %rax
        addq    80(%rbx), %rax

as expected.

But at execution time, it gives me a strange behavior,
So I disassemble the code,

401135:       48 8b 43 68             mov    0x68(%rbx),%rax
401140:       48 c1 e0 20             shl    $0x20,%rax
401144:       48 03 43 50             add    0x50(%rbx),%rax

and it turns out salq are changed to shl which leads to the
strange behavior. shl only allows shift less or equal than 31.

Not sure why and how to fix this...

Thanks,
Feng

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: assemble code and disassembled code in-consistency
  2012-07-06 16:27 assemble code and disassembled code in-consistency Feng LI
@ 2012-07-06 16:48 ` H.J. Lu
  2012-07-06 17:08 ` H.J. Lu
  1 sibling, 0 replies; 4+ messages in thread
From: H.J. Lu @ 2012-07-06 16:48 UTC (permalink / raw)
  To: Feng LI; +Cc: GCC, Binutils

On Fri, Jul 6, 2012 at 9:27 AM, Feng LI <nemokingdom@gmail.com> wrote:
> Hi folks,
>
> I have a backend hook (x86_64) for builtin function expansion, so
> I have this:
>
> expand_simple_binop (DImode, ASHIFT, op0,
>                                 GEN_INT (32),op0,1,OPTAB_DIRECT);
>
> to generate op0 = op0<<32 (op0 is the first argument of this builtin
> function, with type SIZE_T)
>
> The thing goes well in the assemble code, where I got:
>         movq    104(%rbx), %rax
>         salq    $32, %rax
>         addq    80(%rbx), %rax
>
> as expected.
>
> But at execution time, it gives me a strange behavior,
> So I disassemble the code,
>
> 401135:       48 8b 43 68             mov    0x68(%rbx),%rax
> 401140:       48 c1 e0 20             shl    $0x20,%rax
> 401144:       48 03 43 50             add    0x50(%rbx),%rax
>
> and it turns out salq are changed to shl which leads to the
> strange behavior. shl only allows shift less or equal than 31.
>

It is a binutils issue.


-- 
H.J.

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: assemble code and disassembled code in-consistency
  2012-07-06 16:27 assemble code and disassembled code in-consistency Feng LI
  2012-07-06 16:48 ` H.J. Lu
@ 2012-07-06 17:08 ` H.J. Lu
       [not found]   ` <CAPekQOrPMcQKQg6MgatHm6ufo2oRy_-77yg_BfBw7qTZuJfX5w@mail.gmail.com>
  1 sibling, 1 reply; 4+ messages in thread
From: H.J. Lu @ 2012-07-06 17:08 UTC (permalink / raw)
  To: Feng LI; +Cc: GCC

On Fri, Jul 6, 2012 at 9:27 AM, Feng LI <nemokingdom@gmail.com> wrote:
> Hi folks,
>
> I have a backend hook (x86_64) for builtin function expansion, so
> I have this:
>
> expand_simple_binop (DImode, ASHIFT, op0,
>                                 GEN_INT (32),op0,1,OPTAB_DIRECT);
>
> to generate op0 = op0<<32 (op0 is the first argument of this builtin
> function, with type SIZE_T)
>
> The thing goes well in the assemble code, where I got:
>         movq    104(%rbx), %rax
>         salq    $32, %rax
>         addq    80(%rbx), %rax
>
> as expected.
>
> But at execution time, it gives me a strange behavior,
> So I disassemble the code,
>
> 401135:       48 8b 43 68             mov    0x68(%rbx),%rax
> 401140:       48 c1 e0 20             shl    $0x20,%rax
> 401144:       48 03 43 50             add    0x50(%rbx),%rax
>
> and it turns out salq are changed to shl which leads to the
> strange behavior. shl only allows shift less or equal than 31.
>

I was reminded that SHL == SAL.  Your problem lies elsewhere.


H.J.

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: assemble code and disassembled code in-consistency
       [not found]   ` <CAPekQOrPMcQKQg6MgatHm6ufo2oRy_-77yg_BfBw7qTZuJfX5w@mail.gmail.com>
@ 2012-07-06 18:25     ` H.J. Lu
  0 siblings, 0 replies; 4+ messages in thread
From: H.J. Lu @ 2012-07-06 18:25 UTC (permalink / raw)
  To: Feng LI; +Cc: GCC

On Fri, Jul 6, 2012 at 10:49 AM, Feng LI <nemokingdom@gmail.com> wrote:
> So under x86_64 machine, I could do a
> Shl %rax 32 safely without being truncated?

Yes.

> Still , why the suffix q is removed in the disassembled code if they are the
> same?
>

You can get suffix by adding -Msuffix to objdump.

-- 
H.J.

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2012-07-06 18:25 UTC | newest]

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2012-07-06 16:27 assemble code and disassembled code in-consistency Feng LI
2012-07-06 16:48 ` H.J. Lu
2012-07-06 17:08 ` H.J. Lu
     [not found]   ` <CAPekQOrPMcQKQg6MgatHm6ufo2oRy_-77yg_BfBw7qTZuJfX5w@mail.gmail.com>
2012-07-06 18:25     ` H.J. Lu

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