From: "H.J. Lu" <hjl.tools@gmail.com>
To: Uros Bizjak <ubizjak@gmail.com>
Cc: Ulrich Weigand <uweigand@de.ibm.com>,
gcc-patches@gcc.gnu.org, GCC Development <gcc@gcc.gnu.org>
Subject: Re: [RFC PATCH, i386]: Allow zero_extended addresses (+ problems with reload and offsetable address, "o" constraint)
Date: Mon, 08 Aug 2011 17:14:00 -0000 [thread overview]
Message-ID: <CAMe9rOp0DOaQ+6P8CaVH6tLbkXKsNpLDBy5o4wt-SoJy+2+iMg@mail.gmail.com> (raw)
In-Reply-To: <CAFULd4Y5mie9zBP5TbvFpuDxSwbKpp=n3sh8iyr3UpSfiqiYxQ@mail.gmail.com>
On Mon, Aug 8, 2011 at 10:11 AM, Uros Bizjak <ubizjak@gmail.com> wrote:
> On Mon, Aug 8, 2011 at 5:30 PM, Ulrich Weigand <uweigand@de.ibm.com> wrote:
>> Uros Bizjak wrote:
>>
>>> Although, it would be nice for reload to subsequently fix CSE'd
>>> non-offsetable memory by copying address to temporary reg (*as said in
>>> the documentation*), we could simply require an XMM temporary for
>>> TImode reloads to/from integer registers, and this fixes ICE for x32.
>>
>> Moves are special as far as reload is concerned. If there is already
>> a move instruction present *before* reload, it will get fixed up
>> according to its constraints as any other instruction.
>>
>> However, reload will *introduce* new moves as part of its operation,
>> and those will *not* themselves get reloaded. Instead, reload simply
>> assumes that every plain move will just succeed without requiring
>> any reload; if this is not true, the target *must* provide a
>> secondary reload for this move.
>>
>> (Note that the secondary reload could also work by reloading the
>> target address into a temporary; that's up to the target to
>> implement.)
>
> Whoa, indeed.
>
> Using attached patch that reloads memory address instead of going
> through XMM register, the code for the testcase improves from:
>
> test:
> .LFB0:
> .cfi_startproc
> pushq %rbx
> .cfi_def_cfa_offset 16
> .cfi_offset 3, -16
> sall $4, %esi
> addl %edi, %esi
> movdqa (%esi), %xmm0
> movdqa %xmm0, -16(%rsp)
> movq -16(%rsp), %rcx
> movq -8(%rsp), %rbx
> addq $1, %rcx
> adcq $0, %rbx
> movq %rcx, -16(%rsp)
> sall $4, %edx
> movq %rbx, -8(%rsp)
> movdqa -16(%rsp), %xmm0
> movdqa %xmm0, (%esi)
> pxor %xmm0, %xmm0
> movdqa %xmm0, (%edx,%esi)
> popq %rbx
> .cfi_def_cfa_offset 8
> ret
>
> to:
>
> test:
> .LFB0:
> .cfi_startproc
> sall $4, %esi
> pushq %rbx
> .cfi_def_cfa_offset 16
> .cfi_offset 3, -16
> addl %edi, %esi
> pxor %xmm0, %xmm0
> mov %esi, %eax
> movq (%rax), %rcx
> movq 8(%rax), %rbx
> addq $1, %rcx
> adcq $0, %rbx
> sall $4, %edx
> movq %rcx, (%rax)
> movq %rbx, 8(%rax)
> movdqa %xmm0, (%edx,%esi)
> popq %rbx
> .cfi_def_cfa_offset 8
> ret
>
> H.J., can you please test attached patch? This optimization won't
> trigger on x86_64 anymore.
>
I will test it.
Thanks.
--
H.J.
next prev parent reply other threads:[~2011-08-08 17:14 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-05 18:51 Uros Bizjak
2011-08-07 12:39 ` Uros Bizjak
2011-08-08 15:30 ` Ulrich Weigand
2011-08-08 17:12 ` Uros Bizjak
2011-08-08 17:14 ` H.J. Lu [this message]
2011-08-09 7:41 ` Uros Bizjak
2011-08-09 15:40 ` H.J. Lu
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