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From: Paul Koning <paulkoning@comcast.net>
To: GCC Development <gcc@gcc.gnu.org>
Cc: "Péntek Imre" <pentek.imre@gmail.com>,
	"Marc Glisse" <marc.glisse@inria.fr>
Subject: Re: clarification question
Date: Sun, 23 Oct 2022 10:59:15 -0400	[thread overview]
Message-ID: <D98086A3-76DF-4465-95DF-794579917400@comcast.net> (raw)
In-Reply-To: <05af051f-deb4-ea6c-19aa-bce5207513bc@inria.fr>



> On Oct 22, 2022, at 2:38 PM, Marc Glisse via Gcc <gcc@gcc.gnu.org> wrote:
> 
> On Sat, 22 Oct 2022, Péntek Imre via Gcc wrote:
> 
>> https://gcc.gnu.org/backends.html
>> 
>> by "Architecture does not have a single condition code register" do you mean it has none or do you mean it has multiple?
> 
> Either.
> 
> If you look at the examples below, there is a C for riscv, which has 0, and one for sparc, which has several.

Also pdp11, which has two: one for floating point, one for integers, and conditional branches act only on the integer CC register.  So the MD has to describe a "move float CC to integer CC" operation.

GCC supports all these strange things quite nicely -- this is one of several things that the newer CCmode machinery does well and the old "cc0" stuff doesn't.

	paul



      reply	other threads:[~2022-10-23 14:59 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-22 18:12 Péntek Imre
2022-10-22 18:38 ` Marc Glisse
2022-10-23 14:59   ` Paul Koning [this message]

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