From: Andy Walker <ja_walker@earthlink.net>
To: dewar@gnat.com (Robert Dewar), lord@emf.net
Cc: gcc@gcc.gnu.org
Subject: Re: Sythetic registers: modrm/gas question.
Date: Mon, 06 Jan 2003 05:36:00 -0000 [thread overview]
Message-ID: <E18VPel-0003RG-00@snipe.mail.pas.earthlink.net> (raw)
In-Reply-To: <20030105131257.941B4F2D5D@nile.gnat.com>
On Sunday 05 January 2003 07:12 am, Robert Dewar wrote:
<snip>
> Actually I think the idea that the issue is in any sense related to the
> operation of complex caches is completely bogus.
Bogus to you, speculative to me.
> In practice in typical
> x86 code, nearly all EBP references with small offsets (references to
> arguments or locals in the current stack frame) are in L1 cache. All our
> data shows that,
I didn't know that. Again, thank you for the information.
> so if the idea of the SR proposal is somehow to improve
> cache performance, that is unlikely to work out in practice.
<snip>
> You really HAVE to look at specific x86 assembly language sequences to
> see whether there is anything in this idea or not.
I couldn't agree more. I will finish modifying gcc and we will try it and
see.
Andy
next prev parent reply other threads:[~2003-01-06 5:18 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-01-05 13:25 Robert Dewar
2003-01-06 5:36 ` Andy Walker [this message]
2003-01-06 19:42 ` Tom Lord
-- strict thread matches above, loose matches on Subject: below --
2003-01-07 3:13 Robert Dewar
2003-01-05 18:13 Robert Dewar
2003-01-05 20:15 ` Michael S. Zick
2003-01-05 14:24 Robert Dewar
2003-01-05 16:56 ` Michael S. Zick
2003-01-05 17:37 ` Michael S. Zick
2003-01-05 22:33 ` Tom Lord
2003-01-05 12:28 Robert Dewar
2003-01-06 5:04 ` Andy Walker
2003-01-06 19:47 ` Tom Lord
2003-01-05 6:08 Andy Walker
2003-01-06 23:54 ` Mike Stump
2003-01-07 6:15 ` Andy Walker
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