From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 28625 invoked by alias); 8 Jan 2003 05:04:37 -0000 Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org Received: (qmail 28398 invoked from network); 8 Jan 2003 05:02:05 -0000 Received: from unknown (HELO falcon.mail.pas.earthlink.net) (207.217.120.74) by 209.249.29.67 with SMTP; 8 Jan 2003 05:02:05 -0000 Received: from ilmasc01-61.midwest.net ([209.248.16.71] helo=there) by falcon.mail.pas.earthlink.net with smtp (Exim 3.33 #1) id 18W8LZ-0000nm-00; Tue, 07 Jan 2003 21:01:45 -0800 Content-Type: text/plain; charset="iso-8859-1" From: Andy Walker To: dewar@gnat.com (Robert Dewar), lord@emf.net, mszick@goquest.com Subject: Re: An unusual Performance approach using Synthetic registers Date: Wed, 08 Jan 2003 06:08:00 -0000 Cc: gcc@gcc.gnu.org References: <20030107120842.86DA1F28F7@nile.gnat.com> In-Reply-To: <20030107120842.86DA1F28F7@nile.gnat.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Message-Id: X-SW-Source: 2003-01/txt/msg00403.txt.bz2 On Tuesday 07 January 2003 06:08 am, Robert Dewar wrote: > > First, XCHG is what I think of as an Operating System instruction. > > It is one of the very reliable ways to implement > > semaphores. > > Please look through the instruction set more carefully, this is NOT the way > you would implement any sychronization instructions on the x86. The Intel Developer's manual describes XCHG as an instruction to be used to implement semaphors. The locking process is integral to the register-memory form of the instruction and cannot be disabled. The phrasing implied that it locked the whole processor unit. Andy