From: Paul Koning <paulkoning@comcast.net>
To: Eric Botcazou <ebotcazou@adacore.com>
Cc: GCC Mailing List <gcc@gcc.gnu.org>
Subject: Re: Inefficient code
Date: Thu, 05 Jul 2018 20:53:00 -0000 [thread overview]
Message-ID: <F029574A-228D-4459-8414-82AB73F9988B@comcast.net> (raw)
In-Reply-To: <4684420.5pAmr275xc@polaris>
> On Jul 5, 2018, at 4:44 PM, Eric Botcazou <ebotcazou@adacore.com> wrote:
>
> ...
> The GIMPLE pass responsible for the optimization simply punts for the "funny-
> endian ordering" of the PDP11. More generally, you shouldn't expect anything
> sparkling for such a peculiar architecture as the PDP11.
Ok. Yet another item for the machine specific optimization pass (to be written).
So back to the previous one: anything I can do about a 24 bit field getting split into three movqi rather than a movqi plus a movhi? That happens during RTL expand, I believe.
paul
next prev parent reply other threads:[~2018-07-05 20:53 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-05 12:46 Paul Koning
2018-07-05 16:01 ` Segher Boessenkool
2018-07-05 16:29 ` Paul Koning
2018-07-05 20:44 ` Eric Botcazou
2018-07-05 20:53 ` Paul Koning [this message]
2018-07-05 22:47 ` Eric Botcazou
2018-07-06 1:01 ` Paul Koning
2018-07-06 1:04 ` Paul Koning
2018-07-06 6:54 ` Eric Botcazou
2018-07-06 10:18 Bernd Edlinger
2018-07-06 12:55 ` Paul Koning
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