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From: Dale Johannesen <dalej@apple.com>
To: Dorit Naishlos <DORIT@il.ibm.com>
Cc: gcc@gcc.gnu.org, David Edelsohn <dje@makai.watson.ibm.com>,
	Dale Johannesen <dalej@apple.com>
Subject: Re: rs6000.md/altivec.md problem in setting of vector registers
Date: Fri, 19 Mar 2004 20:59:00 -0000	[thread overview]
Message-ID: <FA3D1E5D-79D6-11D8-A952-000A95D7CD40@apple.com> (raw)
In-Reply-To: <OF6E029669.0E5E3F05-ONC2256E5C.000482C4-C2256E5C.0004D314@il.ibm.com>

On Mar 18, 2004, at 4:52 PM, Dorit Naishlos wrote:
> I managed to hack something that causes Reload to make the "right" 
> decision
> and generate the same code as it generates for i386 - i.e., the spill 
> code
> is created out of the loop.
>
> The hack modifies the macro CANNOT_CHANGE_MODE_CLASS in rs6000.h to not
> allow a mode change from a vector mode to a smaller mode in 
> ALTIVEC_REGS or
> GENERAL_REGS. As a result, these register classes cannot be considered 
> for
> allocation in this case; instead, Reload directly creates stores to 
> memory,
> outside the loop, like for i386.

I haven't tried it, but this might well break passing of vector 
parameters in int regs.

  parent reply	other threads:[~2004-03-19 18:57 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <OF6E029669.0E5E3F05-ONC2256E5C.000482C4-C2256E5C.0004D314@il.ibm.com>
2004-03-19  8:45 ` David Edelsohn
2004-03-21  0:36   ` Dorit Naishlos
2004-03-23 22:10     ` David Edelsohn
2004-03-23 17:03       ` Dorit Naishlos
2004-03-19 20:59 ` Dale Johannesen [this message]
2004-03-21  1:47   ` Dorit Naishlos
2004-03-03 16:46 Dorit Naishlos
2004-03-03 17:52 ` David Edelsohn
2004-03-03 18:16   ` Dorit Naishlos
2004-03-03 18:44 ` Dale Johannesen
2004-03-05  0:06   ` Dorit Naishlos
2004-03-05  0:23     ` Dale Johannesen
2004-03-09 18:46       ` David Edelsohn
2004-03-11 22:38     ` David Edelsohn
2004-03-11 23:31       ` Richard Henderson
2004-03-12  3:14         ` David Edelsohn
2004-03-07 18:30   ` Aldy Hernandez

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