From: "Dave Korn" <dk@artimi.com>
To: "'Andrew Haley'" <aph@redhat.com>
Cc: "'Dale Johannesen'" <dalej@apple.com>, <gcc@gcc.gnu.org>,
"'Nathan Sidwell'" <nathan@codesourcery.com>
Subject: RE: warning: right shift count >= width of type
Date: Mon, 29 Nov 2004 18:52:00 -0000 [thread overview]
Message-ID: <NUTMEGUa7IU1pUajEut000001c5@NUTMEG.CAM.ARTIMI.COM> (raw)
In-Reply-To: <16811.22552.200258.472826@cuddles.cambridge.redhat.com>
> -----Original Message-----
> From: gcc-owner On Behalf Of Andrew Haley
> Sent: 29 November 2004 17:11
> Dave Korn writes:
> > So my question is really "Given that it's undefined,
> which means that
> > whatever the compiler does is correct, and given that
> there's already code
> > in there to detect the situation and issue a warning,
> which probably means
> > that it would be very easy at such a point to replace the
> offending RTL with
> > (const_int 0), is there any specific reason why not to?"
>
> I think the idea is that
>
> a << n /* n == 32 */
>
> and
>
> a << 32
>
> should do the same thing. This seems IMO more helpful than
> optimizing away the shift.
Ah, well I can see that as a desirable goal (although who ever said
undefined behaviour had to produce the same results consistently across
different methods of invoking said undefined behaviour?) I suppose.
> No, not at all. The x86 processors interpret this as
>
> a << (n % 32)
>
> > but it's surely only an issue of bugward-compatibility:
> > mathematically, there's really no problem with right-shifting more
> > than the width of the integer, all that happens is that _all_ the
> > bits drop out the right-hand side and you're left with nothing.
>
> That's not what all hardware actually does with shift instructions.
>
> > ISTM reasonable that the result of a right-shift by 32 bits could
> > be assumed to be the same thing you get if you right-shift by 1 bit
> > 32 times....
>
> The chip designers don't agree.
I would argue that the x86 simply does not _provide_ a shift-by-32 bits
instruction, owing to that implicit modulo, any more than a RISC cpu with a
5-bit-wide field in the opcode to encode a shift amount does so.
I myself would want "(n >> 32)" to produce the same result as "((n >> 16)
>> 16)" and indeed "for (int i = 32; i > 0; i--, n >>= 1) ;", and it seems
to be generally agreed that the compiler would be at liberty to so do if it
wants to.
cheers,
DaveK
--
Can't think of a witty .sigline today....
next prev parent reply other threads:[~2004-11-29 18:35 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-11-29 16:30 Dave Korn
2004-11-29 16:33 ` Nathan Sidwell
2004-11-29 17:01 ` Andrew Haley
2004-11-29 17:12 ` Dale Johannesen
2004-11-29 17:14 ` Dave Korn
2004-11-29 17:26 ` Andrew Haley
2004-11-29 18:29 ` Peter Barada
2004-11-29 18:53 ` Dave Korn
2004-11-29 18:52 ` Dave Korn [this message]
2004-11-29 19:09 ` Andrew Haley
2004-11-29 19:17 ` Dale Johannesen
2004-11-29 19:54 ` Dave Korn
2004-11-29 17:38 ` Chris Jefferson
2004-11-29 18:46 ` Dave Korn
2004-11-29 19:19 ` Chris Jefferson
2004-11-29 19:46 ` Dave Korn
2004-11-29 23:49 Paul Schlie
2004-11-30 1:50 ` Andreas Schwab
2004-11-30 4:23 Paul Schlie
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