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In-Reply-To: <FA3D1E5D-79D6-11D8-A952-000A95D7CD40@apple.com>
Subject: Re: rs6000.md/altivec.md problem in setting of vector registers
To: Dale Johannesen <dalej@apple.com>
Cc: gcc@gcc.gnu.org, David Edelsohn <dje@makai.watson.ibm.com>
Message-ID: <OF3E93A0F6.CD0301AD-ONC2256E5C.00706227-C2256E5D.0079DA5E@il.ibm.com>
From: Dorit Naishlos <DORIT@il.ibm.com>
Date: Sun, 21 Mar 2004 01:47:00 -0000
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X-SW-Source: 2004-03/txt/msg01223.txt.bz2


> I haven't tried it, but this might well break passing of vector
> parameters in int regs.

I would be surprised if this hack did not create all kinds of code
generation problems. Maybe it could be reworked or perhaps something else
could be tweaked to achieve the same effect?

dorit




                                                                                                                                       
                      Dale Johannesen                                                                                                  
                      <dalej@apple.com>        To:       Dorit Naishlos/Haifa/IBM@IBMIL                                                
                                               cc:       gcc@gcc.gnu.org, David Edelsohn <dje@makai.watson.ibm.com>, Dale Johannesen   
                      19/03/2004 20:55          <dalej@apple.com>                                                                      
                                               Subject:  Re: rs6000.md/altivec.md problem in setting of vector registers               
                                                                                                                                       




On Mar 18, 2004, at 4:52 PM, Dorit Naishlos wrote:
> I managed to hack something that causes Reload to make the "right"
> decision
> and generate the same code as it generates for i386 - i.e., the spill
> code
> is created out of the loop.
>
> The hack modifies the macro CANNOT_CHANGE_MODE_CLASS in rs6000.h to not
> allow a mode change from a vector mode to a smaller mode in
> ALTIVEC_REGS or
> GENERAL_REGS. As a result, these register classes cannot be considered
> for
> allocation in this case; instead, Reload directly creates stores to
> memory,
> outside the loop, like for i386.

I haven't tried it, but this might well break passing of vector
parameters in int regs.