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* Re: [tm_gccmail@mail.kloo.net: Re: gcc for any microcontroller?]
       [not found] <20030324234249.GA4237@wirex.net>
@ 2003-03-25  2:40 ` Crispin Cowan
  2003-03-25 20:57   ` tm_gccmail
  0 siblings, 1 reply; 2+ messages in thread
From: Crispin Cowan @ 2003-03-25  2:40 UTC (permalink / raw)
  To: danecek, gcc, tm_gccmail

Toshi wrote:

>o Lack of standard addressing modes
>
>  Some processors have no or very few bits of displacement on the indirect
>  addressing mode, which causes gcc problems. Unfortunately, some people
>  are publishing papers which say "you don't need displacement addressing
>  modes because they can be easily simulated" (Crispin Cowan, etc) and
>  some processors have actually been built without displacement addressing
>  modes. This problem complicates many optimizations including CSE, loop
>  optimizations, instruction scheduling, etc.
>
>  Applies to: NIW architecture, IA64, etc.
>
Ok, I assume you are referring to this paper 
http://216.239.39.100/search?q=cache:YcszBDIK49oC:www.dcs.ed.ac.uk/home/cxs/Papers/report413.ps.gz+crispin+cowan++displacement+addressing&hl=en&ie=UTF-8

Let me correct a few misconceptions:

    * The paper does *not* say that "you don't need displacement
      addressing because it can be simulated." The paper describes a
      cute hack that attempts to expose parallelism in a narrow
      instruction word by encoding an ALU and a load/store op in the
      same 32-bit word. To make that work, we had to employ the ugly
      kludge of losing displacement addressing on the load/store part.
    * It is *not* a general claim that you can simulate displacement
      addressing with arithmetic at no cost. It is only a specific claim
      that you can get away with this in the context of the proposed NIW
      architecture because you have available slots to compute the
      arithmetic.
    * The whole thing was a hair-brained scheme that was IMHO rightly
      rejected by peer review when I attempted to publish it (I wrote it
      10 years ago as a side-line while I was a young graduate student)
      It was never actually published anywhere other than as a tech
      report. Peer review matters, and it works, even when it is my
      paper being rejected :-)

Thanks,
    Crispin

-- 
Crispin Cowan, Ph.D.                      http://wirex.com/~crispin/
Chief Scientist, WireX                    http://wirex.com
HP/Trend Micro Immunix Secured Solutions
http://h18000.www1.hp.com/products/servers/solutions/iis/
			    Just say ".Nyet"


^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [tm_gccmail@mail.kloo.net: Re: gcc for any microcontroller?]
  2003-03-25  2:40 ` [tm_gccmail@mail.kloo.net: Re: gcc for any microcontroller?] Crispin Cowan
@ 2003-03-25 20:57   ` tm_gccmail
  0 siblings, 0 replies; 2+ messages in thread
From: tm_gccmail @ 2003-03-25 20:57 UTC (permalink / raw)
  To: Crispin Cowan; +Cc: danecek, gcc

On Mon, 24 Mar 2003, Crispin Cowan wrote:

...
> Let me correct a few misconceptions:
..
>     * The whole thing was a hair-brained scheme that was IMHO rightly
>       rejected by peer review when I attempted to publish it (I wrote it
>       10 years ago as a side-line while I was a young graduate student)
>       It was never actually published anywhere other than as a tech
>       report. Peer review matters, and it works, even when it is my
>       paper being rejected :-)
> 
> Thanks,
>     Crispin

Thank you for clarifying the situation.

For a semi-unpublished paper, it's had remarkable influence..and
casualties :)

Toshi


^ permalink raw reply	[flat|nested] 2+ messages in thread

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2003-03-25  2:40 ` [tm_gccmail@mail.kloo.net: Re: gcc for any microcontroller?] Crispin Cowan
2003-03-25 20:57   ` tm_gccmail

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