From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 29822 invoked by alias); 3 Aug 2011 13:27:55 -0000 Received: (qmail 29813 invoked by uid 22791); 3 Aug 2011 13:27:54 -0000 X-SWARE-Spam-Status: No, hits=-3.5 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from cantor2.suse.de (HELO mx2.suse.de) (195.135.220.15) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 03 Aug 2011 13:27:40 +0000 Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.221.2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 01E4C8C061; Wed, 3 Aug 2011 15:27:38 +0200 (CEST) Date: Wed, 03 Aug 2011 13:27:00 -0000 From: Michael Matz To: Richard Guenther Cc: Georg-Johann Lay , Ulrich Weigand , Ian Lance Taylor , Mikael Pettersson , Michael Walle , Hans-Peter Nilsson , Richard Henderson , gcc@gcc.gnu.org Subject: Re: libgcc: strange optimization In-Reply-To: Message-ID: References: <201108030911.p739BZri018360@d06av02.portsmouth.uk.ibm.com> <4E3919EA.2080002@gjlay.de> MIME-Version: 1.0 Content-Type: MULTIPART/MIXED; BOUNDARY="168427776-841760333-1312378058=:26760" X-IsSubscribed: yes Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org X-SW-Source: 2011-08/txt/msg00067.txt.bz2 This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --168427776-841760333-1312378058=:26760 Content-Type: TEXT/PLAIN; charset=utf-8 Content-Transfer-Encoding: 8BIT Content-length: 1692 Hi, On Wed, 3 Aug 2011, Richard Guenther wrote: > > Yes, that's reasonable.  As I understand the docs, in code like > > > > void foo () > > { > >   register int var asm ("r1") = 10; > >   asm (";; use r1"); > > } > > > > there is nothing that connects var to the asm and assuming that > > r1 holds 10 in the asm is a user error. > > > > The only place where the asm attached to a variable needs to have > > effect are the inline asm sequences that explicitly refer to > > respective variables.  If there is no inline asm referencing a > > local register variable, there is on difference to a non-register > > auto variable; there could even be a warning that in such a case > > that > > > >   register int var asm ("r1") = 10; > > > > is equivalent to > > > >   int var = 10; > > > > This would render local register variables even more functional > > because no one needed to care if there were implicit library calls or > > things like that. > > Yes, I like that idea. I do too. Except it doesn't work :) There's a common idiom of accessing registers read-only by declaring local register vars. E.g. to (*grasp*) the stack pointer. There won't be a DEF for that register var, and hence at use-points we couldn't reload any sensible values into those registers (and we really shouldn't clobber the stack pointer in this way). We could introduce that special semantic only for non-reserved registers, and require no writes to register vars for reserved registers. Or we could simply do: if (any_local_reg_vars) optimize = 0; But I already see people wanting to _do_ optimization also with local reg vars, "just not the wrong optimizations" ;-/ Ciao, Michael. --168427776-841760333-1312378058=:26760--