From: "Richard Earnshaw (lists)" <Richard.Earnshaw@arm.com>
To: sellcey@cavium.com, Francesco Petrogalli <Francesco.Petrogalli@arm.com>
Cc: James Greenhalgh <James.Greenhalgh@arm.com>,
"Sekhar, Ashwin" <Ashwin.Sekhar@cavium.com>,
gcc <gcc@gcc.gnu.org>,
Marcus Shawcroft <Marcus.Shawcroft@arm.com>, nd <nd@arm.com>
Subject: Re: [Aarch64] Vector Function Application Binary Interface Specification for OpenMP
Date: Wed, 16 May 2018 16:30:00 -0000 [thread overview]
Message-ID: <a8761c95-e4fb-dd92-8988-825c8b34475f@arm.com> (raw)
In-Reply-To: <1526487700.29509.6.camel@cavium.com>
On 16/05/18 17:21, Steve Ellcey wrote:
> On Tue, 2018-05-15 at 18:29 +0000, Francesco Petrogalli wrote:
>
>> Hi Steve,
>>
>> I am happy to let you know that the Vector Function ABI for AArch64
>> is now public and available via the link at [1].
>>
>> Donât hesitate to contact me in case you have any questions.
>>
>> Kind regards,
>>
>> Francesco
>>
>> [1] https://developer.arm.com/products/software-development-tools/hpc
>> /arm-compiler-for-hpc/vector-function-abi
>>
>>>
>>> Steve Ellcey
>>> sellcey@cavium.com
>
> Thanks for publishing this Francesco, it looks like the main issue for
> GCC is that the Vector Function ABI has different caller saved / callee
> saved register conventions than the standard ARM calling convention.
>
> If I understand things correctly, in the standard calling convention
> the callee will only save the bottom 64 bits of V8-V15 and so the
> caller needs to save those registers if it is using the top half.  In
> the Vector calling convention the callee will save all 128 bits of
> these registers (and possibly more registers) so the caller does not
> have to save these registers at all, even if it is using all 128 bits
> of them.
>
> It doesn't look like GCC has any existing mechanism for having different
> sets of caller saved/callee saved registers depending on the function
> attributes of the calling or called function.
>
> Changing what registers a callee function saves and restores shouldn't
> be too difficult since that can be done when generating the prologue
> and epilogue code but changing what registers a caller saves/restores
> when doing the call seems trickier.  The macro
> TARGET_HARD_REGNO_CALL_PART_CLOBBERED doesn't know anything about the
> function being called.  It returns true/false depending on just the
> register number and mode.
>
> Steve Ellcey
> sellcey@cavium.com
>
Actually, we can. See, for example, the attribute((pcs)) for the ARM
port. I think we could probably handle this automagically for the SVE
vector calling convention in AArch64.
R.
next prev parent reply other threads:[~2018-05-16 16:30 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-09 21:47 Steve Ellcey
2018-05-15 18:29 ` Francesco Petrogalli
2018-05-16 16:21 ` Steve Ellcey
2018-05-16 16:30 ` Richard Earnshaw (lists) [this message]
2018-05-16 17:30 ` Steve Ellcey
2018-05-16 21:11 ` Richard Sandiford
2018-05-24 17:50 ` Steve Ellcey
2018-05-26 10:09 ` Richard Sandiford
2018-05-26 22:13 ` Segher Boessenkool
2018-05-27 15:59 ` Jeff Law
2018-05-29 10:06 ` Richard Sandiford
2018-05-31 10:39 ` Alan Hayward
2018-06-12 3:11 ` Jeff Law
2018-06-11 23:06 ` Jeff Law
2018-07-02 18:16 ` Francesco Petrogalli
-- strict thread matches above, loose matches on Subject: below --
2017-03-15 9:50 Sekhar, Ashwin
2017-03-17 14:02 ` James Greenhalgh
2017-03-20 4:30 ` Sekhar, Ashwin
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