From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 37621 invoked by alias); 8 Aug 2019 23:09:10 -0000 Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org Received: (qmail 37505 invoked by uid 89); 8 Aug 2019 23:09:10 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=AWL,BAYES_00,SPF_PASS autolearn=ham version=3.3.1 spammy=TFmode, documenting, tfmode, wish X-HELO: esa2.mentor.iphmx.com Received: from esa2.mentor.iphmx.com (HELO esa2.mentor.iphmx.com) (68.232.141.98) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 08 Aug 2019 23:09:09 +0000 IronPort-SDR: HMn7BEMxLB949kLwKov19jnLsN3nDC5Kuf4kSvpT05dC4Lb8IeRBw/cUAuhAz0avw4saZtko+O sVRjGxU/bzTEfO1/4DGzzRwfowGRevNjC1SiQ1KNtHcZMgF9GkxqRFVhakkLhBxnfso0UNIHKl JSK7/TNyOqpE58brYfAaA/X/8uWWoVPZYAHz5SrCW3sf4vaVXjVJuOKDio9eHiwC2mzYyc5QeZ WDwLcyJ+ow/n6H0xCVcmgakMXNOWRxvdrsxOfrDv63hqwvHSTdaUXXLTzOJ06VRGCMnJpSPrr+ w0Y= Received: from orw-gwy-02-in.mentorg.com ([192.94.38.167]) by esa2.mentor.iphmx.com with ESMTP; 08 Aug 2019 15:09:07 -0800 IronPort-SDR: vx06PGzQpDgNuvMTDgsipInwjn3oWBfEDQ++kB/OG/hdV/nImh1oQh1aUtnCOvjpxeR3qVau0w wEgaWDsRJCRlVvquc33YLgtg2SIlbdD0qcLUyFRdoAi23wgR6mrVfXVhYtaNOkk1sojPfsIql8 RTxWs3QncW6FYmAUw6UMzADe5W58piv5ELORsW+zAEacv0Un3rmozcmJ1/onAmRQamoXKd3eHQ g+cew04R3yc0EoxcbmWDJy5qJQgpqUpc2iB61B20X0r4qpZn/Qb3b9Pp65jWM+P3Xl7C58mn1A jDw= Date: Thu, 08 Aug 2019 23:09:00 -0000 From: Joseph Myers To: Segher Boessenkool CC: Tejas Joshi , , Martin Jambor , Subject: Re: Expansion of narrowing math built-ins into power instructions In-Reply-To: <20190808200514.GL31406@gate.crashing.org> Message-ID: References: <87sgqnx4i6.fsf@oldenburg2.str.redhat.com> <20190731144722.GS31406@gate.crashing.org> <20190808200514.GL31406@gate.crashing.org> User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Return-Path: joseph@codesourcery.com X-SW-Source: 2019-08/txt/msg00064.txt.bz2 On Thu, 8 Aug 2019, Segher Boessenkool wrote: > These current patterns all take the same mode for all inputs and outputs > (that's what 3 indicates, say, fadddf3). You will need to define > something that takes two SFs in and produces a DF. That cannot really For example, md.texi describes standard patterns such as mulhisi3 that multiply two HImode values and produce an SImode result (widening integer multiply). Using a similar naming pattern, you might have a pattern adddfsf3 that multiplies two DFmode values and produces an SFmode result (or you could call it something like add_truncdfsf3 if you wish to emphasise the truncation involved, for example). Similarly addtfsf3 that multiplies TFmode and produces an SFmode result, and so on. Of course these names need documenting (and you need corresponding RTL for them to generate that distinguishes the fused add+truncate from the different RTL for separate addition and truncation with double rounding). In cases where long double and double have the same mode, the daddl function should use the existing adddf3 pattern. -- Joseph S. Myers joseph@codesourcery.com