From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 52483 invoked by alias); 14 Aug 2019 16:11:23 -0000 Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org Received: (qmail 52471 invoked by uid 89); 14 Aug 2019 16:11:23 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=AWL,BAYES_00,SPF_PASS autolearn=ham version=3.3.1 spammy= X-HELO: esa1.mentor.iphmx.com Received: from esa1.mentor.iphmx.com (HELO esa1.mentor.iphmx.com) (68.232.129.153) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 14 Aug 2019 16:11:22 +0000 IronPort-SDR: kUXUmhyLMg1HK0zs132hZOFDNrd015vfWMwtWNtz4ryX6QPr9VIT3b0WyW7/EvuftNaKuM6Wct UVvDt3vd1pdIfLboi4QlYpdJsO8wsGl5xZKRSNGexWgGRR5UuK0BqdncvI3N0/V3u/AFZ3S9Om TxhNHna+Tzjg54lypawPCqEFxL2N9OpuyxUYTI7Z4Jfk+mBH/KxTegBeYBcba7bDfJ9olQwYXD MxoKjcVWvq1l6Uauc20a5z0x/HrRmgf71/PiEIO0DQPzugvNq1+D5+cKt5FME9YPxzjQXRAC3w g5g= Received: from orw-gwy-01-in.mentorg.com ([192.94.38.165]) by esa1.mentor.iphmx.com with ESMTP; 14 Aug 2019 08:11:01 -0800 IronPort-SDR: DXLBDJdtp9tkXpyUMYX7rrVmbcveGdrViU/CfSjrBtC+YjjQ4DEp5WWvat7PKEPdrOEGVpzqTZ hphO9Y/s9ivtc1zPIhhMpuBeZYwzgfDcR6OBG2g9XwniUTGs2ULVqo4583urRPXfUb/4DuUZkE 7t+HNuAqFEsH3EPFTXogUoLQHMGHC95cmB5XjXwITp6+dUaVAXsJ/a6tr+TzvG9OQ42XNtKVct Sw0ScSE7FnDl/L0xGUeBnpAH35OPxXs47+YgHHGthaC2NbN2P9tWdEWUAhY1Sk4qYyD5OOOAxe VEg= Date: Wed, 14 Aug 2019 16:11:00 -0000 From: Joseph Myers To: Segher Boessenkool CC: Tejas Joshi , , Martin Jambor , Subject: Re: Expansion of narrowing math built-ins into power instructions In-Reply-To: <20190814072127.GE31406@gate.crashing.org> Message-ID: References: <20190808200514.GL31406@gate.crashing.org> <20190811165916.GX31406@gate.crashing.org> <20190812175450.GB31406@gate.crashing.org> <20190812215224.GC31406@gate.crashing.org> <20190814072127.GE31406@gate.crashing.org> User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Return-Path: joseph@codesourcery.com X-SW-Source: 2019-08/txt/msg00101.txt.bz2 On Wed, 14 Aug 2019, Segher Boessenkool wrote: > I think you can do one RTL code that replaces float_truncate in > > > > > > (define_insn "add_truncdfsf3" > > > > > [(set (match_operand:SF 0 "gpc_reg_operand" "=f,wa") > > > > > (float_truncate:SF > > > > > (plus:DF (match_operand:DF 1 "gpc_reg_operand" "%d,wa") > > > > > (match_operand:DF 2 "gpc_reg_operand" "d,wa"))))] > > but that is only meant for such explicit contraction. This can then > happily be used to implement all such patterns. Is there some issue > with that I overlook? Yes, I think such a separate RTL code would work (as would an architecture-specific UNSPEC) - it just needs to avoid the pattern matching RTL that can arise other than from the built-in functions. (Everything to do with needing -fno-math-errno to expand into such instructions should be handled in the architecture-independent compiler.) -- Joseph S. Myers joseph@codesourcery.com