From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from angie.orcam.me.uk (angie.orcam.me.uk [IPv6:2001:4190:8020::4]) by sourceware.org (Postfix) with ESMTP id 08E873835408 for ; Wed, 24 Feb 2021 22:00:16 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 08E873835408 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=orcam.me.uk Authentication-Results: sourceware.org; spf=none smtp.mailfrom=macro@orcam.me.uk Received: by angie.orcam.me.uk (Postfix, from userid 500) id F306792009C; Wed, 24 Feb 2021 23:00:14 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by angie.orcam.me.uk (Postfix) with ESMTP id EEC6892009B; Wed, 24 Feb 2021 23:00:14 +0100 (CET) Date: Wed, 24 Feb 2021 23:00:14 +0100 (CET) From: "Maciej W. Rozycki" To: Jim Wilson cc: Jiaxun Yang , GCC Development , syq@debian.org, "open list:MIPS" , Matthew Fortune , Binutils Subject: Re: HELP: MIPS PC Relative Addressing In-Reply-To: Message-ID: References: <3ddc0595-c443-868e-c0a4-08ae8934f116@flygoat.com> User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Spam-Status: No, score=-3488.6 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, KAM_INFOUSMEBIZ, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=no autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 24 Feb 2021 22:00:17 -0000 On Wed, 24 Feb 2021, Jim Wilson wrote: > > I commented on it once, in the course of the FDPIC design project, and I > > find it broken by design. Sadly it has made it into the RISC-V psABI and > > it is hard to revert at this time, too many places have started relying on > > it. > > > > It was already a production ABI before you asked for the change. And > changing a production ABI is extremely difficult. You were not the first > to complain about this, and you probably won't be the last. Thanks for chiming in. I accepted it as a fact of life, but we don't have to follow the mistake with the MIPS psABI. If you ever decide to have a RISC-V NewABI just as MIPS did at one point, then you can reevaluate the choices made. At least there are no REL relocations there with RISC-V, it was a gross mistake to have them with MIPS o32. I think we can try switching away from them with R6, or at least evaluate what would be required to do so. Maciej