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From: Richard Biener <rguenther@suse.de>
To: Vidya Praveen <vidyapraveen@arm.com>
Cc: "gcc@gcc.gnu.org" <gcc@gcc.gnu.org>, "ook@ucw.cz" <ook@ucw.cz>,
	"marc.glisse@inria.fr" <marc.glisse@inria.fr>
Subject: Re: [RFC] Vectorization of indexed elements
Date: Fri, 06 Dec 2013 11:48:00 -0000	[thread overview]
Message-ID: <alpine.LNX.2.00.1312061244580.8615@zhemvz.fhfr.qr> (raw)
In-Reply-To: <20131204161000.GB26784@e103625-lin.cambridge.arm.com>

On Wed, 4 Dec 2013, Vidya Praveen wrote:

> Hi Richi,
> 
> Apologies for the late response. I was on vacation.
> 
> On Mon, Oct 14, 2013 at 09:04:58AM +0100, Richard Biener wrote:
> > > void
> > > foo (int *__restrict__ a,
> > >      int *__restrict__ b,
> > >      int c)
> > > {
> > >   int i;
> > > 
> > >   for (i = 0; i < 8; i++)
> > >     a[i] = b[i] * c;
> > > }
> > 
> > Both cases can be handled by patterns that match
> > 
> >   (mul:VXSI (reg:VXSI
> >              (vec_duplicate:VXSI reg:SI)))
> 
> How do I arrive at this pattern in the first place? Assuming vec_init with
> uniform values are expanded as vec_duplicate, it will still be two expressions.
> 
> That is,
> 
> (set reg:VXSI (vec_duplicate:VXSI (reg:SI)))
> (set reg:VXSI (mul:VXSI (reg:VXSI) (reg:VXSI)))

Yes, but then combine comes along and creates

 (set reg:VXSI (mul:VXSI (reg:VXSI (vec_duplicate:VXSI (reg:SI)))))

which matches one of your define_insn[_and_split]s.

> > You'd then "consume" the vec_duplicate and implement it as
> > load scalar into element zero of the vector and use index mult
> > with index zero.
> 
> If I understand this correctly, you are suggesting to leave the scalar
> load from memory as it is but treat the 
> 
> (mul:VXSI (reg:VXSI (vec_duplicate:VXSI reg:SI)))
> 
> as 
> 
> load reg:VXSI[0], reg:SI
> mul reg:VXSI, reg:VXSI, re:VXSI[0] // by reusing the destination register perhaps
> 
> either by generating instructions directly or by using define_split. Am I right?

Possibly.  Or allow memory as operand 2 for your pattern (so, not
reg:SI but mem:SI).  Combine should be happy with that, too.
 
> If I'm right, then my concern is that it may be possible to simplify this further
> by loading directly to a indexed vector register from memory but it's too late at
> this point for such simplification to be possible.
> 
> Please let me know what am I not understanding.

Not sure.  Did you try it?

Richard.

      reply	other threads:[~2013-12-06 11:48 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-09-09 17:25 Vidya Praveen
2013-09-09 18:02 ` Marc Glisse
2013-09-10  8:25   ` Richard Biener
2013-09-24 15:03     ` Vidya Praveen
2013-09-25  9:22       ` Richard Biener
2013-09-30 13:01         ` Vidya Praveen
2013-09-24 15:04   ` Vidya Praveen
2013-09-25  9:25     ` Richard Biener
2013-09-27 14:50       ` Vidya Praveen
2013-09-27 15:19         ` Vidya Praveen
2013-09-30 12:55           ` Vidya Praveen
2013-09-30 13:19             ` Richard Biener
2013-09-30 14:00               ` Vidya Praveen
2013-10-01  8:26                 ` Richard Biener
2013-10-11 14:54                   ` Vidya Praveen
2013-10-11 15:05                     ` Jakub Jelinek
2013-12-04 17:07                       ` Vidya Praveen
2013-10-14  8:05                     ` Richard Biener
2013-12-04 16:10                       ` Vidya Praveen
2013-12-06 11:48                         ` Richard Biener [this message]

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