[RFC PATCH v3 0/8][i386] Use out-of-line stubs for ms_abi pro/epilogues

[RFC PATCH v3 0/8][i386] Use out-of-line stubs for ms_abi pro/epilogues

[Daniel Santos]

Uros or Jan,
Please take this as a ping, as I never bothered pinging after submitting 
v2 since I found a few more issues with it. :)  Although I realize this 
would be a GCC 8 stage 1 item, I would like to try to get it finished up 
and tentatively approved asap.  I have tried to summarize this patch set 
as clearly and succinctly below as possible.  Thanks!

  * This patch set depends upon the "Use aligned SSE movs for re-aligned
    MS ABI pro/epilogues" patch set:
    https://gcc.gnu.org/ml/gcc-patches/2016-12/msg01859.html
  * I have submitted a test program submitted separately:
    https://gcc.gnu.org/ml/gcc/2017-02/msg00009.html


Summary
=======

When a 64-bit Microsoft function calls and System V function, ABI 
differences requires RSI, RDI and XMM6-15 to be considered as 
clobbered.  Saving these registers inline can cost as much as 109 bytes 
and a similar amount for restoring. This patch set targets 64-bit Wine 
and aims to mitigate some of these costs by adding ms/sysv save & 
restore stubs to libgcc, which are called from pro/epilogues rather than 
emitting the code inline.  And since we're already tinkering with stubs, 
they will also manages the save/restore of all remaining registers if 
possible.  Analysis of building Wine 64 demonstrates a reduction of 
.text by around 20%, which also translates into a reduction of Wine's 
install size by 34MiB.

As there will usually only be 3 stubs in memory at any time, I'm using 
the larger mov instructions instead of push/pop to facilitate better 
parallelization. The basic theory is that the combination of better 
parallelization and reduced I-cache misses will offset the extra 
instructions required for implementation, although I have not produced 
actual performance data yet.

For now, I have called this feature -moutline-msabi-xlogues, but Sandra 
Loosemore has this suggestion: 
(https://gcc.gnu.org/ml/gcc-patches/2016-11/msg02670.html)

> Just as a suggestion (I'm not an i386 maintainer), I'd recommend
> spelling the name of this option -mno-inline-msabi-xlogues instead of
> -moutline-msabi-xlogues, and making the default -minline-msabi-xlogues.

When enabled, the feature is activated when an ms_abi function calls a 
sysv_abi function if the following is true (evaluated in 
ix86_compute_frame_layout):

     TARGET_SSE
     && !ix86_function_ms_hook_prologue (current_function_decl)
     && !SEH
     && !crtl->calls_eh_return
     && !ix86_static_chain_on_stack
     && !ix86_using_red_zone ()
     && !flag_split_stack

Some of these, like __builtin_eh_return, might be easy to add but I 
don't have a test for them.


StackLayout
============

When active, registers are saved on the stack differently. Note that 
when not active, stack layout is *unchanged*.

     [arguments]
                             <- ARG_POINTER
     saved pc

     saved frame pointer     if frame_pointer_needed
                             <- HARD_FRAME_POINTER
     [saved regs]            if not managed by stub, (e.g. explicitly 
clobbered)
                             <- reg_save_offset
     [padding0]
                             <- stack_realign_offset
                             <- Start of out-of-line, stub-managed regs
     XMM6-15
     RSI
     RDI
     [RBX]                   if RBX is clobbered
     [RBP]                   if RBP and RBX are clobbered and HFP not used.
     [R12]                   if R12 and all previous regs are clobbered
     [R13]                   if R13 and all previous regs are clobbered
     [R14]                   if R14 and all previous regs are clobbered
     [R15]                   if R15 and all previous regs are clobbered
                             <- end of stub-saved/restored regs
     [padding1]
                             <- outlined_save_offset
                             <- sse_regs_save_offset
     [padding2]
                             <- FRAME_POINTER
     [va_arg registers]

     [frame]
     ... etc.


Stubs
=====

There are two sets of stubs for use with and without hard frame 
pointers.  Each set has a save, a restore and a restore-as-tail-call 
that performs the function's return.  Each stub has entry points for the 
number of registers it's saving. The non-tail-call restore is used when 
a sibling call is the tail.  If a normal register is explicitly 
clobbered out of the order that hard registers are usually assigned in 
(e.g., __asm__ __volatile__ ("":::"r15")), then that register will be 
saved and restored as normal and not by the stub.

Stub names:
__savms64_(12-18)
__resms64_(12-18)
__resms64x_(12-18)

__savms64f_(12-17)
__resms64f_(12-17)
__resms64fx_(12-17)

Save stubs use RAX as a base register and restore stubs use RSI, the 
later which is overwritten before returning.  Restore-as-tail-call for 
the non-HFP case uses R10 to restore the stack pointer before returning.

Samples
=======

Standard case with RBX, RBP and R12 also being used in function:

   Prologue:
     lea    -0x78(%rsp),%rax
     sub    $0x108,%rsp
     callq  5874b <__savms64_15>

   Epilogue (r10 stores the value to restore the stack pointer to):
     lea    0x90(%rsp),%rsi
     lea    0x78(%rsi),%r10
     jmpq   587eb <__resms64x_15>

Stack pointer realignment case (same clobbers):

   Prologue, stack realignment case:
     push   %rbp
     mov    %rsp,%rbp
     and    $0xfffffffffffffff0,%rsp
     lea    -0x70(%rsp),%rax
     sub    $0x100,%rsp
     callq  57fc7 <__savms64f_15>

   Epilogue, stack realignment case:
     lea    0x90(%rsp),%rsi
     jmpq   58013 <__resms64fx_15>


Testing
=======

A comprehensive test program is submitted separately with no additional 
tests failing.  I have also run Wine's tests with no additional failures 
(although a few very minor tweaks have gone in since I last ran Wine's 
tests).  I have not run -flto tests on Wine as I haven't yet found a way 
to Wine to build with -flto, maybe I'm just doing it wrong.

  gcc/config/i386/i386.c         | 691 
++++++++++++++++++++++++++++++++++++++---
  gcc/config/i386/i386.h         |  22 +-
  gcc/config/i386/i386.opt       |   5 +
  gcc/config/i386/predicates.md  | 155 +++++++++
  gcc/config/i386/sse.md         |  37 +++
  gcc/doc/invoke.texi            |  11 +-
  libgcc/config.host             |   2 +-
  libgcc/config/i386/i386-asm.h  |  82 +++++
  libgcc/config/i386/resms64.S   |  57 ++++
  libgcc/config/i386/resms64f.S  |  55 ++++
  libgcc/config/i386/resms64fx.S |  57 ++++
  libgcc/config/i386/resms64x.S  |  59 ++++
  libgcc/config/i386/savms64.S   |  57 ++++
  libgcc/config/i386/savms64f.S  |  55 ++++
  libgcc/config/i386/t-msabi     |   7 +
  15 files changed, 1314 insertions(+), 38 deletions(-)


Daniel Santos

[PATCH 2/8] [i386] Add option -moutline-msabi-xlogues

[Daniel Santos]

Adds the option to i386.opt and i386.c and adds documentation to
invoke.texi.

Signed-off-by: Daniel Santos <daniel.santos@pobox.com>
---
 gcc/config/i386/i386.c   |  3 ++-
 gcc/config/i386/i386.opt |  5 +++++
 gcc/doc/invoke.texi      | 11 ++++++++++-
 3 files changed, 17 insertions(+), 2 deletions(-)

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 05974208a27..9a0dfdc77ba 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -4361,7 +4361,8 @@ ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2,
     { "-mstv",				MASK_STV },
     { "-mavx256-split-unaligned-load",	MASK_AVX256_SPLIT_UNALIGNED_LOAD },
     { "-mavx256-split-unaligned-store",	MASK_AVX256_SPLIT_UNALIGNED_STORE },
-    { "-mprefer-avx128",		MASK_PREFER_AVX128 }
+    { "-mprefer-avx128",		MASK_PREFER_AVX128 },
+    { "-mmoutline-msabi-xlogues",	MASK_OUTLINE_MSABI_XLOGUES }
   };
 
   /* Additional flag options.  */
diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
index 0ee31845eba..0ff93f831c0 100644
--- a/gcc/config/i386/i386.opt
+++ b/gcc/config/i386/i386.opt
@@ -538,6 +538,11 @@ Enum(calling_abi) String(sysv) Value(SYSV_ABI)
 EnumValue
 Enum(calling_abi) String(ms) Value(MS_ABI)
 
+moutline-msabi-xlogues
+Target Report Mask(OUTLINE_MSABI_XLOGUES) Save
+Reduces function size by using out-of-line stubs to save & restore registers
+clobberd by differences in Microsoft and System V ABIs.
+
 mveclibabi=
 Target RejectNegative Joined Var(ix86_veclibabi_type) Enum(ix86_veclibabi) Init(ix86_veclibabi_type_none)
 Vector library ABI to use.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 4b13aeb7426..901abbf99d6 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1210,7 +1210,7 @@ See RS/6000 and PowerPC Options.
 -msse2avx  -mfentry  -mrecord-mcount  -mnop-mcount  -m8bit-idiv @gol
 -mavx256-split-unaligned-load  -mavx256-split-unaligned-store @gol
 -malign-data=@var{type}  -mstack-protector-guard=@var{guard} @gol
--mmitigate-rop  -mgeneral-regs-only}
+-mmitigate-rop  -mgeneral-regs-only  -moutline-msabi-xlogues}
 
 @emph{x86 Windows Options}
 @gccoptlist{-mconsole  -mcygwin  -mno-cygwin  -mdll @gol
@@ -25304,6 +25304,15 @@ You can control this behavior for specific functions by
 using the function attributes @code{ms_abi} and @code{sysv_abi}.
 @xref{Function Attributes}.
 
+@item -moutline-msabi-xlogues
+@opindex moutline-msabi-xlogues
+@opindex no-moutline-msabi-xlogues
+Due to differences in 64-bit ABIs, any Microsoft ABI function that calls a
+SysV ABI function must consider RSI, RDI and XMM6-15 as clobbered, emitting
+fairly lengthy prologues and epilogues.  This option generates prologues and
+epilogues that instead call stubs in libgcc to perform these saves & restores,
+thus reducing function size at the cost of and few extra instructions.
+
 @item -mtls-dialect=@var{type}
 @opindex mtls-dialect
 Generate code to access thread-local storage using the @samp{gnu} or
-- 
2.11.0

[PATCH 6/8] [i386] Add patterns and predicates foutline-msabi-xlouges

[Daniel Santos]

Adds the predicates save_multiple and restore_multiple to predicates.md,
which are used by following patterns in sse.md:

* save_multiple - insn that calls a save stub
* restore_multiple - call_insn that calls a save stub and returns to the
  function to allow a sibling call (which should typically offer better
  optimization than the restore stub as the tail call)
* restore_multiple_and_return - a jump_insn that returns from the
  function as a tail-call.
* restore_multiple_leave_return - like the above, but restores the frame
  pointer before returning.

Signed-off-by: Daniel Santos <daniel.santos@pobox.com>
---
 gcc/config/i386/predicates.md | 155 ++++++++++++++++++++++++++++++++++++++++++
 gcc/config/i386/sse.md        |  37 ++++++++++
 2 files changed, 192 insertions(+)

diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index 8f250a2e720..36fe8abc3f4 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -1657,3 +1657,158 @@
   (ior (match_operand 0 "register_operand")
        (and (match_code "const_int")
 	    (match_test "op == constm1_rtx"))))
+
+;; Return true if:
+;; 1. first op is a symbol reference,
+;; 2. >= 13 operands, and
+;; 3. operands 2 to end is one of:
+;;   a. save a register to a memory location, or
+;;   b. restore stack pointer.
+(define_predicate "save_multiple"
+  (match_code "parallel")
+{
+  const unsigned nregs = XVECLEN (op, 0);
+  rtx head = XVECEXP (op, 0, 0);
+  unsigned i;
+
+  if (GET_CODE (head) != USE)
+    return false;
+  else
+    {
+      rtx op0 = XEXP (head, 0);
+      if (op0 == NULL_RTX || GET_CODE (op0) != SYMBOL_REF)
+	return false;
+    }
+
+  if (nregs < 13)
+    return false;
+
+  for (i = 2; i < nregs; i++)
+    {
+      rtx e, src, dest;
+
+      e = XVECEXP (op, 0, i);
+
+      switch (GET_CODE (e))
+	{
+	  case SET:
+	    src  = SET_SRC (e);
+	    dest = SET_DEST (e);
+
+	    /* storing a register to memory.  */
+	    if (GET_CODE (src) == REG && GET_CODE (dest) == MEM)
+	      {
+		rtx addr = XEXP (dest, 0);
+
+		/* Good if dest address is in RAX.  */
+		if (GET_CODE (addr) == REG
+		    && REGNO (addr) == AX_REG)
+		  continue;
+
+		/* Good if dest address is offset of RAX.  */
+		if (GET_CODE (addr) == PLUS
+		    && GET_CODE (XEXP (addr, 0)) == REG
+		    && REGNO (XEXP (addr, 0)) == AX_REG)
+		  continue;
+	      }
+	    break;
+
+	  default:
+	    break;
+	}
+	return false;
+    }
+  return true;
+})
+
+;; Return true if:
+;; * first op is (return) or a a use (symbol reference),
+;; * >= 14 operands, and
+;; * operands 2 to end are one of:
+;;   - restoring a register from a memory location that's an offset of RSI.
+;;   - clobbering a reg
+;;   - adjusting SP
+(define_predicate "restore_multiple"
+  (match_code "parallel")
+{
+  const unsigned nregs = XVECLEN (op, 0);
+  rtx head = XVECEXP (op, 0, 0);
+  unsigned i;
+
+  switch (GET_CODE (head))
+    {
+      case RETURN:
+	i = 3;
+	break;
+
+      case USE:
+      {
+	rtx op0 = XEXP (head, 0);
+
+	if (op0 == NULL_RTX || GET_CODE (op0) != SYMBOL_REF)
+	  return false;
+
+	i = 1;
+	break;
+      }
+
+      default:
+	return false;
+    }
+
+  if (nregs < i + 12)
+    return false;
+
+  for (; i < nregs; i++)
+    {
+      rtx e, src, dest;
+
+      e = XVECEXP (op, 0, i);
+
+      switch (GET_CODE (e))
+	{
+	  case CLOBBER:
+	    continue;
+
+	  case SET:
+	    src  = SET_SRC (e);
+	    dest = SET_DEST (e);
+
+	    /* Restoring a register from memory.  */
+	    if (GET_CODE (src) == MEM && GET_CODE (dest) == REG)
+	      {
+		rtx addr = XEXP (src, 0);
+
+		/* Good if src address is in RSI.  */
+		if (GET_CODE (addr) == REG
+		    && REGNO (addr) == SI_REG)
+		  continue;
+
+		/* Good if src address is offset of RSI.  */
+		if (GET_CODE (addr) == PLUS
+		    && GET_CODE (XEXP (addr, 0)) == REG
+		    && REGNO (XEXP (addr, 0)) == SI_REG)
+		  continue;
+
+		/* Good if adjusting stack pointer.  */
+		if (GET_CODE (dest) == REG
+		    && REGNO (dest) == SP_REG
+		    && GET_CODE (src) == PLUS
+		    && GET_CODE (XEXP (src, 0)) == REG
+		    && REGNO (XEXP (src, 0)) == SP_REG)
+		  continue;
+	      }
+
+	    /* Restoring stack pointer from another register.  */
+	    if (GET_CODE (dest) == REG && REGNO (dest) == SP_REG
+		&& GET_CODE (src) == REG)
+	      continue;
+	    break;
+
+	  default:
+	    break;
+	}
+	return false;
+    }
+  return true;
+})
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index a19c8f2bc2e..b9db729c427 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -19885,3 +19885,40 @@
           (match_operand:VI48_512 1 "nonimmediate_operand" "vm")))]
   "TARGET_AVX512VPOPCNTDQ"
   "vpopcnt<ssemodesuffix>\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}")
+
+;; Save multiple registers out-of-line.
+(define_insn "save_multiple<mode>"
+  [(match_parallel 0 "save_multiple"
+    [(use (match_operand:P 1 "symbol_operand"))
+     (const_int 0)
+    ])]
+  "TARGET_SSE && TARGET_64BIT"
+  "call\t%P1")
+
+;; Restore multiple registers out-of-line.
+(define_insn "restore_multiple<mode>"
+  [(match_parallel 0 "restore_multiple"
+    [(use (match_operand:P 1 "symbol_operand"))])]
+  "TARGET_SSE && TARGET_64BIT"
+  "call\t%P1")
+
+;; Restore multiple registers out-of-line and return.
+(define_insn "restore_multiple_and_return<mode>"
+  [(match_parallel 0 "restore_multiple"
+    [(return)
+     (use (match_operand:P 1 "symbol_operand"))
+     (const_int 0)
+    ])]
+  "TARGET_SSE && TARGET_64BIT"
+  "jmp\t%P1")
+
+;; Restore multiple registers out-of-line when hard frame pointer is used,
+;; perform the leave operation prior to returning (from the function).
+(define_insn "restore_multiple_leave_return<mode>"
+  [(match_parallel 0 "restore_multiple"
+    [(return)
+     (use (match_operand:P 1 "symbol_operand"))
+     (const_int 1)
+    ])]
+  "TARGET_SSE && TARGET_64BIT"
+  "jmp\t%P1")
-- 
2.11.0

[PATCH 4/8] [i386] Modify ix86_save_reg to optionally omit stub-managed registers

[Daniel Santos]

Adds HARD_REG_SET stub_managed_regs to track registers that will be
managed by the pro/epilogue stubs for the function.

Adds a third parameter bool ignore_outlined to ix86_save_reg to specify
rather or not the count should include registers marked in
stub_managed_regs.

Signed-off-by: Daniel Santos <daniel.santos@pobox.com>
---
 gcc/config/i386/i386.c | 31 ++++++++++++++++++++-----------
 1 file changed, 20 insertions(+), 11 deletions(-)

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 663a8c1b1ed..962f805c033 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -12454,6 +12454,10 @@ ix86_hard_regno_scratch_ok (unsigned int regno)
 	      && df_regs_ever_live_p (regno)));
 }
 
+/* Registers who's save & restore will be managed by stubs called from
+   pro/epilogue.  */
+static HARD_REG_SET GTY(()) stub_managed_regs;
+
 /* Return true if register class CL should be an additional allocno
    class.  */
 
@@ -12466,7 +12470,7 @@ ix86_additional_allocno_class_p (reg_class_t cl)
 /* Return TRUE if we need to save REGNO.  */
 
 static bool
-ix86_save_reg (unsigned int regno, bool maybe_eh_return)
+ix86_save_reg (unsigned int regno, bool maybe_eh_return, bool ignore_outlined)
 {
   /* If there are no caller-saved registers, we preserve all registers,
      except for MMX and x87 registers which aren't supported when saving
@@ -12534,6 +12538,10 @@ ix86_save_reg (unsigned int regno, bool maybe_eh_return)
 	}
     }
 
+  if (ignore_outlined && cfun->machine->outline_ms_sysv
+      && in_hard_reg_set_p (stub_managed_regs, DImode, regno))
+    return false;
+
   if (crtl->drap_reg
       && regno == REGNO (crtl->drap_reg)
       && !cfun->machine->no_drap_save_restore)
@@ -12554,7 +12562,7 @@ ix86_nsaved_regs (void)
   int regno;
 
   for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
-    if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true))
+    if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true, true))
       nregs ++;
   return nregs;
 }
@@ -12570,7 +12578,7 @@ ix86_nsaved_sseregs (void)
   if (!TARGET_64BIT_MS_ABI)
     return 0;
   for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
-    if (SSE_REGNO_P (regno) && ix86_save_reg (regno, true))
+    if (SSE_REGNO_P (regno) && ix86_save_reg (regno, true, true))
       nregs ++;
   return nregs;
 }
@@ -12650,6 +12658,7 @@ ix86_compute_frame_layout (struct ix86_frame *frame)
 
   frame->nregs = ix86_nsaved_regs ();
   frame->nsseregs = ix86_nsaved_sseregs ();
+  CLEAR_HARD_REG_SET (stub_managed_regs);
 
   /* 64-bit MS ABI seem to require stack alignment to be always 16,
      except for function prologues, leaf functions and when the defult
@@ -13040,7 +13049,7 @@ ix86_emit_save_regs (void)
   rtx_insn *insn;
 
   for (regno = FIRST_PSEUDO_REGISTER - 1; regno-- > 0; )
-    if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true))
+    if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true, true))
       {
 	insn = emit_insn (gen_push (gen_rtx_REG (word_mode, regno)));
 	RTX_FRAME_RELATED_P (insn) = 1;
@@ -13130,7 +13139,7 @@ ix86_emit_save_regs_using_mov (HOST_WIDE_INT cfa_offset)
   unsigned int regno;
 
   for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
-    if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true))
+    if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, true, true))
       {
         ix86_emit_save_reg_using_mov (word_mode, regno, cfa_offset);
 	cfa_offset -= UNITS_PER_WORD;
@@ -13145,7 +13154,7 @@ ix86_emit_save_sse_regs_using_mov (HOST_WIDE_INT cfa_offset)
   unsigned int regno;
 
   for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
-    if (SSE_REGNO_P (regno) && ix86_save_reg (regno, true))
+    if (SSE_REGNO_P (regno) && ix86_save_reg (regno, true, true))
       {
 	ix86_emit_save_reg_using_mov (V4SFmode, regno, cfa_offset);
 	cfa_offset -= GET_MODE_SIZE (V4SFmode);
@@ -13529,13 +13538,13 @@ get_scratch_register_on_entry (struct scratch_reg *sr)
 	       && !static_chain_p
 	       && drap_regno != CX_REG)
 	regno = CX_REG;
-      else if (ix86_save_reg (BX_REG, true))
+      else if (ix86_save_reg (BX_REG, true, false))
 	regno = BX_REG;
       /* esi is the static chain register.  */
       else if (!(regparm == 3 && static_chain_p)
-	       && ix86_save_reg (SI_REG, true))
+	       && ix86_save_reg (SI_REG, true, false))
 	regno = SI_REG;
-      else if (ix86_save_reg (DI_REG, true))
+      else if (ix86_save_reg (DI_REG, true, false))
 	regno = DI_REG;
       else
 	{
@@ -14639,7 +14648,7 @@ ix86_emit_restore_regs_using_mov (HOST_WIDE_INT cfa_offset,
   unsigned int regno;
 
   for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
-    if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, maybe_eh_return))
+    if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, maybe_eh_return, true))
       {
 	rtx reg = gen_rtx_REG (word_mode, regno);
 	rtx mem;
@@ -14678,7 +14687,7 @@ ix86_emit_restore_sse_regs_using_mov (HOST_WIDE_INT cfa_offset,
   unsigned int regno;
 
   for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
-    if (SSE_REGNO_P (regno) && ix86_save_reg (regno, maybe_eh_return))
+    if (SSE_REGNO_P (regno) && ix86_save_reg (regno, maybe_eh_return, true))
       {
 	rtx reg = gen_rtx_REG (V4SFmode, regno);
 	rtx mem;
-- 
2.11.0

[PATCH 1/8] [i386] Minor refactoring

[Daniel Santos]

For the sake of clarity, I've separated out these minor refactoring
changes from the rest of the patches.

Signed-off-by: Daniel Santos <daniel.santos@pobox.com>
---
 gcc/config/i386/i386.c | 21 ++++++++++-----------
 gcc/config/i386/i386.h |  4 +++-
 2 files changed, 13 insertions(+), 12 deletions(-)

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index abc0136f78e..05974208a27 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -2422,7 +2422,7 @@ static int const x86_64_int_return_registers[4] =
 
 /* Additional registers that are clobbered by SYSV calls.  */
 
-int const x86_64_ms_sysv_extra_clobbered_registers[12] =
+unsigned const x86_64_ms_sysv_extra_clobbered_registers[12] =
 {
   SI_REG, DI_REG,
   XMM6_REG, XMM7_REG,
@@ -12388,6 +12388,7 @@ ix86_builtin_setjmp_frame_value (void)
 static void
 ix86_compute_frame_layout (struct ix86_frame *frame)
 {
+  struct machine_function *m = cfun->machine;
   unsigned HOST_WIDE_INT stack_alignment_needed;
   HOST_WIDE_INT offset;
   unsigned HOST_WIDE_INT preferred_alignment;
@@ -12422,19 +12423,19 @@ ix86_compute_frame_layout (struct ix86_frame *frame)
      scheduling that can be done, which means that there's very little point
      in doing anything except PUSHs.  */
   if (TARGET_SEH)
-    cfun->machine->use_fast_prologue_epilogue = false;
+    m->use_fast_prologue_epilogue = false;
 
   /* During reload iteration the amount of registers saved can change.
      Recompute the value as needed.  Do not recompute when amount of registers
      didn't change as reload does multiple calls to the function and does not
      expect the decision to change within single iteration.  */
   else if (!optimize_bb_for_size_p (ENTRY_BLOCK_PTR_FOR_FN (cfun))
-           && cfun->machine->use_fast_prologue_epilogue_nregs != frame->nregs)
+	   && m->use_fast_prologue_epilogue_nregs != frame->nregs)
     {
       int count = frame->nregs;
       struct cgraph_node *node = cgraph_node::get (current_function_decl);
 
-      cfun->machine->use_fast_prologue_epilogue_nregs = count;
+      m->use_fast_prologue_epilogue_nregs = count;
 
       /* The fast prologue uses move instead of push to save registers.  This
          is significantly longer, but also executes faster as modern hardware
@@ -12451,14 +12452,14 @@ ix86_compute_frame_layout (struct ix86_frame *frame)
       if (node->frequency < NODE_FREQUENCY_NORMAL
 	  || (flag_branch_probabilities
 	      && node->frequency < NODE_FREQUENCY_HOT))
-        cfun->machine->use_fast_prologue_epilogue = false;
+	m->use_fast_prologue_epilogue = false;
       else
-        cfun->machine->use_fast_prologue_epilogue
+	m->use_fast_prologue_epilogue
 	   = !expensive_function_p (count);
     }
 
   frame->save_regs_using_mov
-    = (TARGET_PROLOGUE_USING_MOVE && cfun->machine->use_fast_prologue_epilogue
+    = (TARGET_PROLOGUE_USING_MOVE && m->use_fast_prologue_epilogue
        /* If static stack checking is enabled and done with probes,
 	  the registers need to be saved before allocating the frame.  */
        && flag_stack_check != STATIC_BUILTIN_STACK_CHECK);
@@ -28479,11 +28480,9 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1,
   else if (TARGET_64BIT_MS_ABI
 	   && (!callarg2 || INTVAL (callarg2) != -2))
     {
-      int const cregs_size
-	= ARRAY_SIZE (x86_64_ms_sysv_extra_clobbered_registers);
-      int i;
+      unsigned i;
 
-      for (i = 0; i < cregs_size; i++)
+      for (i = 0; i < NUM_X86_64_MS_CLOBBERED_REGS; i++)
 	{
 	  int regno = x86_64_ms_sysv_extra_clobbered_registers[i];
 	  machine_mode mode = SSE_REGNO_P (regno) ? TImode : DImode;
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index a5cd8452424..ed7e4edec56 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -2162,7 +2162,9 @@ extern int const dbx_register_map[FIRST_PSEUDO_REGISTER];
 extern int const dbx64_register_map[FIRST_PSEUDO_REGISTER];
 extern int const svr4_dbx_register_map[FIRST_PSEUDO_REGISTER];
 
-extern int const x86_64_ms_sysv_extra_clobbered_registers[12];
+extern unsigned const x86_64_ms_sysv_extra_clobbered_registers[12];
+#define NUM_X86_64_MS_CLOBBERED_REGS \
+  (ARRAY_SIZE (x86_64_ms_sysv_extra_clobbered_registers))
 
 /* Before the prologue, RA is at 0(%esp).  */
 #define INCOMING_RETURN_ADDR_RTX \
-- 
2.11.0

[PATCH 8/8] [i386] Add remainder of moutline-msabi-xlogues implementation

[Daniel Santos]

Adds functions emit_msabi_outlined_save and emit_msabi_outlined_restore,
which are called from ix86_expand_prologue and ix86_expand_epilogue,
respectively.  Also adds the code to ix86_expand_call that enables the
optimization (setting the machine_function's outline_ms_sysv field).

Signed-off-by: Daniel Santos <daniel.santos@pobox.com>
---
 gcc/config/i386/i386.c | 281 +++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 272 insertions(+), 9 deletions(-)

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index b3d48ac2e78..f9a02bedbee 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -14115,6 +14115,79 @@ ix86_elim_entry_set_got (rtx reg)
     }
 }
 
+static rtx
+gen_frame_set (rtx reg, rtx frame_reg, int offset, bool store)
+{
+  rtx addr, mem;
+
+  if (offset)
+    addr = gen_rtx_PLUS (Pmode, frame_reg, GEN_INT (offset));
+  mem = gen_frame_mem (GET_MODE (reg), offset ? addr : frame_reg);
+  return gen_rtx_SET (store ? mem : reg, store ? reg : mem);
+}
+
+static inline rtx
+gen_frame_load (rtx reg, rtx frame_reg, int offset)
+{
+  return gen_frame_set (reg, frame_reg, offset, false);
+}
+
+static inline rtx
+gen_frame_store (rtx reg, rtx frame_reg, int offset)
+{
+  return gen_frame_set (reg, frame_reg, offset, true);
+}
+
+static void
+ix86_emit_msabi_outlined_save (const struct ix86_frame &frame)
+{
+  struct machine_function *m = cfun->machine;
+  const unsigned ncregs = NUM_X86_64_MS_CLOBBERED_REGS
+			  + m->outline_ms_sysv_extra_regs;
+  rtvec v = rtvec_alloc (ncregs - 1 + 3);
+  unsigned int align, i, vi = 0;
+  rtx_insn *insn;
+  rtx sym, addr;
+  rtx rax = gen_rtx_REG (word_mode, AX_REG);
+  const struct xlogue_layout &xlogue = xlogue_layout::get_instance ();
+  HOST_WIDE_INT rax_offset = xlogue.get_stub_ptr_offset () + m->fs.sp_offset;
+  HOST_WIDE_INT stack_alloc_size = frame.stack_pointer_offset - m->fs.sp_offset;
+  HOST_WIDE_INT stack_align_off_in = xlogue.get_stack_align_off_in ();
+
+  /* Verify that the incoming stack 16-byte alignment offset matches the
+     layout we're using.  */
+  gcc_assert (stack_align_off_in == (m->fs.sp_offset & UNITS_PER_WORD));
+
+  /* Get the stub symbol.  */
+  sym = xlogue.get_stub_rtx (frame_pointer_needed ? XLOGUE_STUB_SAVE_HFP
+						  : XLOGUE_STUB_SAVE);
+  RTVEC_ELT (v, vi++) = gen_rtx_USE (VOIDmode, sym);
+  RTVEC_ELT (v, vi++) = const0_rtx;
+
+  /* Setup RAX as the stub's base pointer.  */
+  align = GET_MODE_ALIGNMENT (V4SFmode);
+  addr = choose_baseaddr (rax_offset, &align);
+  gcc_assert (align >= GET_MODE_ALIGNMENT (V4SFmode));
+  insn = emit_insn (gen_rtx_SET (rax, addr));
+
+  gcc_assert (stack_alloc_size >= xlogue.get_stack_space_used ());
+  pro_epilogue_adjust_stack (stack_pointer_rtx, stack_pointer_rtx,
+			     GEN_INT (-stack_alloc_size), -1,
+			     m->fs.cfa_reg == stack_pointer_rtx);
+  for (i = 0; i < ncregs; ++i)
+    {
+      const xlogue_layout::reginfo &r = xlogue.get_reginfo (i);
+      rtx reg = gen_rtx_REG ((SSE_REGNO_P (r.regno) ? V4SFmode : word_mode),
+			     r.regno);
+      RTVEC_ELT (v, vi++) = gen_frame_store (reg, rax, -r.offset);;
+    }
+
+  gcc_assert (vi == (unsigned)GET_NUM_ELEM (v));
+
+  insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, v));
+  RTX_FRAME_RELATED_P (insn) = true;
+}
+
 /* Expand the prologue into a bunch of separate insns.  */
 
 void
@@ -14362,7 +14435,7 @@ ix86_expand_prologue (void)
 	 performing the actual alignment.  Otherwise we cannot guarantee
 	 that there's enough storage above the realignment point.  */
       allocate = frame.stack_realign_allocate_offset - m->fs.sp_offset;
-      if (allocate)
+      if (allocate && !m->outline_ms_sysv)
         pro_epilogue_adjust_stack (stack_pointer_rtx, stack_pointer_rtx,
 				   GEN_INT (-allocate), -1, false);
 
@@ -14370,7 +14443,6 @@ ix86_expand_prologue (void)
       insn = emit_insn (ix86_gen_andsp (stack_pointer_rtx,
 					stack_pointer_rtx,
 					GEN_INT (-align_bytes)));
-
       /* For the purposes of register save area addressing, the stack
 	 pointer can no longer be used to access anything in the frame
 	 below m->fs.sp_realigned_offset and the frame pointer cannot be
@@ -14381,6 +14453,9 @@ ix86_expand_prologue (void)
       gcc_assert (m->fs.sp_realigned_offset == frame.stack_realign_offset);
     }
 
+  if (m->outline_ms_sysv)
+    ix86_emit_msabi_outlined_save (frame);
+
   allocate = frame.stack_pointer_offset - m->fs.sp_offset;
 
   if (flag_stack_usage_info)
@@ -14701,17 +14776,19 @@ ix86_emit_restore_regs_using_pop (void)
   unsigned int regno;
 
   for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
-    if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, false))
+    if (GENERAL_REGNO_P (regno) && ix86_save_reg (regno, false, true))
       ix86_emit_restore_reg_using_pop (gen_rtx_REG (word_mode, regno));
 }
 
-/* Emit code and notes for the LEAVE instruction.  */
+/* Emit code and notes for the LEAVE instruction.  If insn is non-null,
+   omits the emit and only attaches the notes.  */
 
 static void
-ix86_emit_leave (void)
+ix86_emit_leave (rtx_insn *insn)
 {
   struct machine_function *m = cfun->machine;
-  rtx_insn *insn = emit_insn (ix86_gen_leave ());
+  if (!insn)
+    insn = emit_insn (ix86_gen_leave ());
 
   ix86_add_queued_cfa_restore_notes (insn);
 
@@ -14805,6 +14882,157 @@ ix86_emit_restore_sse_regs_using_mov (HOST_WIDE_INT cfa_offset,
       }
 }
 
+static void
+ix86_emit_msabi_outlined_restore (const struct ix86_frame &frame,
+				  bool use_call, int style)
+{
+  struct machine_function *m = cfun->machine;
+  const unsigned ncregs = NUM_X86_64_MS_CLOBBERED_REGS
+			  + m->outline_ms_sysv_extra_regs;
+  unsigned elems_needed = ncregs + 1;
+  rtvec v;
+  unsigned int align, i, vi = 0;
+  rtx_insn *insn;
+  rtx sym, tmp;
+  rtx rsi = gen_rtx_REG (word_mode, SI_REG);
+  rtx r10 = NULL_RTX;
+  const struct xlogue_layout &xlogue = xlogue_layout::get_instance ();
+  HOST_WIDE_INT stub_ptr_offset = xlogue.get_stub_ptr_offset ();
+  HOST_WIDE_INT rsi_offset = frame.stack_realign_offset + stub_ptr_offset;
+  rtx rsi_frame_load = NULL_RTX;
+  HOST_WIDE_INT rsi_restore_offset = (HOST_WIDE_INT)-1;
+  enum xlogue_stub stub;
+
+  gcc_assert (!m->fs.fp_valid || frame_pointer_needed);
+
+  /* If using a realigned stack, we should never start with padding.  */
+  gcc_assert (!stack_realign_fp || !xlogue.get_stack_align_off_in ());
+
+  /* Setup RSI as the stub's base pointer.  */
+  align = GET_MODE_ALIGNMENT (V4SFmode);
+  tmp = choose_baseaddr (rsi_offset, &align);
+  gcc_assert (align >= GET_MODE_ALIGNMENT (V4SFmode));
+  emit_insn (gen_rtx_SET (rsi, tmp));
+
+  /* Get a symbol for the stub.  */
+  if (frame_pointer_needed)
+    stub = use_call ? XLOGUE_STUB_RESTORE_HFP
+		    : XLOGUE_STUB_RESTORE_HFP_TAIL;
+  else
+    stub = use_call ? XLOGUE_STUB_RESTORE
+		    : XLOGUE_STUB_RESTORE_TAIL;
+  sym = xlogue.get_stub_rtx (stub);
+
+  if (!use_call)
+    elems_needed += frame_pointer_needed ? 2 : 3;
+  v = rtvec_alloc (elems_needed);
+
+  /* We call the epilogue stub when we need to pop incoming args or we are
+     doing a sibling call as the tail.  Otherwise, we will emit a jmp to the
+     epilogue stub and it is the tail-call.  */
+  if (use_call)
+      RTVEC_ELT (v, vi++) = gen_rtx_USE (VOIDmode, sym);
+  else
+    {
+      RTVEC_ELT (v, vi++) = ret_rtx;
+      RTVEC_ELT (v, vi++) = gen_rtx_USE (VOIDmode, sym);
+      if (!frame_pointer_needed)
+	{
+	  /* If no hard frame pointer, we set R10 to the SP restore value.  */
+	  gcc_assert (!m->fs.fp_valid);
+	  gcc_assert (m->fs.cfa_reg == stack_pointer_rtx);
+	  gcc_assert (m->fs.sp_valid);
+
+	  r10 = gen_rtx_REG (DImode, R10_REG);
+	  tmp = gen_rtx_PLUS (Pmode, rsi, GEN_INT (stub_ptr_offset));
+	  emit_insn (gen_rtx_SET (r10, tmp));
+	  RTVEC_ELT (v, vi++) = const0_rtx;
+	}
+      else
+	{
+	  gcc_assert (m->fs.fp_valid);
+	  gcc_assert (m->fs.cfa_reg == hard_frame_pointer_rtx);
+
+	  RTVEC_ELT (v, vi++) = const1_rtx;
+	}
+    }
+
+  /* Generate frame load insns and restore notes.  */
+  for (i = 0; i < ncregs; ++i)
+    {
+      const xlogue_layout::reginfo &r = xlogue.get_reginfo (i);
+      enum machine_mode mode = SSE_REGNO_P (r.regno) ? V4SFmode : word_mode;
+      rtx reg, frame_load;
+
+      reg = gen_rtx_REG (mode, r.regno);
+      frame_load = gen_frame_load (reg, rsi, r.offset);
+
+      /* Save RSI frame load insn & note to add last.  */
+      if (r.regno == SI_REG)
+	{
+	  gcc_assert (!rsi_frame_load);
+	  rsi_frame_load = frame_load;
+	  rsi_restore_offset = r.offset;
+	}
+      else
+	{
+	  RTVEC_ELT (v, vi++) = frame_load;
+	  ix86_add_cfa_restore_note (NULL, reg, r.offset);
+	}
+    }
+
+  /* Add RSI frame load & restore note at the end.  */
+  gcc_assert (rsi_frame_load);
+  gcc_assert (rsi_restore_offset != (HOST_WIDE_INT)-1);
+  RTVEC_ELT (v, vi++) = rsi_frame_load;
+  ix86_add_cfa_restore_note (NULL, gen_rtx_REG (DImode, SI_REG),
+			     rsi_restore_offset);
+
+  /* Finally, for tail-call w/o a hard frame pointer, set SP to R10.  */
+  if (!use_call && !frame_pointer_needed)
+    {
+      gcc_assert (m->fs.sp_valid);
+      gcc_assert (!m->fs.sp_realigned);
+      RTVEC_ELT (v, vi++) = gen_rtx_SET (stack_pointer_rtx, r10);
+
+      /* At this point, R10 should point to frame.stack_realign_offset.  */
+      if (m->fs.cfa_reg == stack_pointer_rtx)
+	m->fs.cfa_offset += m->fs.sp_offset - frame.stack_realign_offset;
+      m->fs.sp_offset = frame.stack_realign_offset;
+    }
+
+  gcc_assert (vi == (unsigned int)GET_NUM_ELEM (v));
+  tmp = gen_rtx_PARALLEL (VOIDmode, v);
+  if (use_call)
+      insn = emit_insn (tmp);
+  else
+    {
+      insn = emit_jump_insn (tmp);
+      JUMP_LABEL (insn) = ret_rtx;
+
+      if (frame_pointer_needed)
+	ix86_emit_leave (insn);
+      else
+	{
+	  /* Need CFA adjust note.  */
+	  tmp = gen_rtx_SET (stack_pointer_rtx, r10);
+	  add_reg_note (insn, REG_CFA_ADJUST_CFA, tmp);
+	}
+    }
+
+  RTX_FRAME_RELATED_P (insn) = true;
+  ix86_add_queued_cfa_restore_notes (insn);
+
+  /* If we're not doing a tail-call, we need to adjust the stack.  */
+  if (use_call && m->fs.sp_valid)
+    {
+      HOST_WIDE_INT dealloc = m->fs.sp_offset - frame.stack_realign_offset;
+      pro_epilogue_adjust_stack (stack_pointer_rtx, stack_pointer_rtx,
+				GEN_INT (dealloc), style,
+				m->fs.cfa_reg == stack_pointer_rtx);
+    }
+}
+
 /* Restore function stack, frame, and registers.  */
 
 void
@@ -14815,6 +15043,7 @@ ix86_expand_epilogue (int style)
   struct ix86_frame frame;
   bool restore_regs_via_mov;
   bool using_drap;
+  bool restore_stub_is_tail = false;
 
   ix86_finalize_stack_realign_flags ();
   ix86_compute_frame_layout (&frame);
@@ -14917,7 +15146,37 @@ ix86_expand_epilogue (int style)
     ix86_emit_restore_sse_regs_using_mov (frame.sse_reg_save_offset,
 					  style == 2);
 
-  if (restore_regs_via_mov)
+  if (m->outline_ms_sysv)
+    {
+      int pop_incoming_args = crtl->args.pops_args && crtl->args.size;
+
+      /* We cannot use a tail-call for the stub if:
+	 1. We have to pop incoming args,
+	 2. We have additional int regs to restore, or
+	 3. A sibling call will be the tail-call, or
+	 4. We are emitting an eh_return_internal epilogue.
+
+	 TODO: Item 4 has not yet tested!
+
+	 If any of the above are true, we will call the stub rather than
+	 jump to it.  */
+      restore_stub_is_tail = !(pop_incoming_args || frame.nregs || style != 1);
+      ix86_emit_msabi_outlined_restore (frame, !restore_stub_is_tail, style);
+    }
+
+  /* If using out-of-line stub that is a tail-call, then...*/
+  if (m->outline_ms_sysv && restore_stub_is_tail)
+    {
+      /* TODO: parinoid tests. (remove)  */
+      gcc_assert (m->fs.sp_valid);
+      gcc_assert (!m->fs.sp_realigned);
+      gcc_assert (!m->fs.fp_valid);
+      gcc_assert (!m->fs.realigned);
+      gcc_assert (m->fs.sp_offset == UNITS_PER_WORD);
+      gcc_assert (!crtl->drap_reg);
+      gcc_assert (!frame.nregs);
+    }
+  else if (restore_regs_via_mov)
     {
       rtx t;
 
@@ -15048,7 +15307,7 @@ ix86_expand_epilogue (int style)
       else if (TARGET_USE_LEAVE
 	       || optimize_bb_for_size_p (EXIT_BLOCK_PTR_FOR_FN (cfun))
 	       || !cfun->machine->use_fast_prologue_epilogue)
-	ix86_emit_leave ();
+	ix86_emit_leave (NULL);
       else
         {
 	  pro_epilogue_adjust_stack (stack_pointer_rtx,
@@ -15159,7 +15418,7 @@ ix86_expand_epilogue (int style)
       else
 	emit_jump_insn (gen_simple_return_pop_internal (popc));
     }
-  else
+  else if (!m->outline_ms_sysv || !restore_stub_is_tail)
     emit_jump_insn (gen_simple_return_internal ());
 
   /* Restore the state back to the state from the prologue,
@@ -28848,6 +29107,10 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1,
 
 	  clobber_reg (&use, gen_rtx_REG (mode, regno));
 	}
+
+      /* Set here, but it may get cleared later.  */
+      if (TARGET_OUTLINE_MSABI_XLOGUES)
+	cfun->machine->outline_ms_sysv = true;
     }
 
   if (vec_len > 1)
-- 
2.11.0

[PATCH 5/8] [i386] Modify ix86_compute_frame_layout for foutline-msabi-xlogues

[Daniel Santos]

ix86_compute_frame_layout will now populate fields added to structs
machine_function and ix86_frame, which are used by xlogue_layout::get_instance
to determine the correct instance to return.

Signed-off-by: Daniel Santos <daniel.santos@pobox.com>
---
 gcc/config/i386/i386.c | 105 +++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 101 insertions(+), 4 deletions(-)

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 962f805c033..b3d48ac2e78 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -2703,12 +2703,29 @@ struct GTY(()) stack_local_entry {
    saved frame pointer			if frame_pointer_needed
 					<- HARD_FRAME_POINTER
    [saved regs]
-					<- regs_save_offset
+					<- reg_save_offset
    [padding0]
 					<- stack_realign_offset
    [saved SSE regs]
+	OR
+   [stub-saved registers for ms x64 --> sysv clobbers
+			<- Start of out-of-line, stub-saved/restored regs
+			   (see libgcc/config/i386/(sav|res)ms64*.S)
+     [XMM6-15]
+     [RSI]
+     [RDI]
+     [?RBX]		only if RBX is clobbered
+     [?RBP]		only if RBP and RBX are clobbered
+     [?R12]		only if R12 and all previous regs are clobbered
+     [?R13]		only if R13 and all previous regs are clobbered
+     [?R14]		only if R14 and all previous regs are clobbered
+     [?R15]		only if R15 and all previous regs are clobbered
+			<- end of stub-saved/restored regs
+     [padding1]
+   ]
+					<- outlined_save_offset
 					<- sse_regs_save_offset
-   [padding1]          |
+   [padding2]
 		       |		<- FRAME_POINTER
    [va_arg registers]  |
 		       |
@@ -2733,6 +2750,7 @@ struct ix86_frame
   HOST_WIDE_INT reg_save_offset;
   HOST_WIDE_INT stack_realign_allocate_offset;
   HOST_WIDE_INT stack_realign_offset;
+  HOST_WIDE_INT outlined_save_offset;
   HOST_WIDE_INT sse_reg_save_offset;
 
   /* When save_regs_using_mov is set, emit prologue using
@@ -12638,6 +12656,22 @@ ix86_builtin_setjmp_frame_value (void)
   return stack_realign_fp ? hard_frame_pointer_rtx : virtual_stack_vars_rtx;
 }
 
+/* Disables out-of-lined msabi to sysv pro/epilogues and emits a warning if
+   warn_once is null, or *warn_once is zero.  */
+static void disable_outline_msabi_xlogues (int *warn_once, const char *msg)
+{
+  cfun->machine->outline_ms_sysv = false;
+  if (!warn_once || !*warn_once)
+    {
+      warning (OPT_moutline_msabi_xlogues,
+	       "Out-of-lining pro/epilogues for Microsoft ABI functions is "
+	       "not currently compatible with %s%s.", msg,
+	       !warn_once ? ", and is disabled for this function" : "");
+    }
+    if (warn_once)
+      *warn_once = 1;
+}
+
 /* When using -fsplit-stack, the allocation routines set a field in
    the TCB to the bottom of the stack plus this much space, measured
    in bytes.  */
@@ -12656,9 +12690,54 @@ ix86_compute_frame_layout (struct ix86_frame *frame)
   HOST_WIDE_INT size = get_frame_size ();
   HOST_WIDE_INT to_allocate;
 
+  CLEAR_HARD_REG_SET (stub_managed_regs);
+
+  /* m->outline_ms_sysv is initially enabled in ix86_expand_call for all 64-bit
+   * ms_abi functions that call a sysv function.  We now need to prune away
+   * cases where it should be disabled.  */
+  if (TARGET_64BIT && m->outline_ms_sysv)
+  {
+    static int warned_seh;
+
+    gcc_assert (TARGET_64BIT_MS_ABI);
+    gcc_assert (TARGET_OUTLINE_MSABI_XLOGUES);
+
+    if (!TARGET_SSE)
+      m->outline_ms_sysv = false;
+
+    /* Don't break hot-patched functions.  */
+    else if (ix86_function_ms_hook_prologue (current_function_decl))
+      m->outline_ms_sysv = false;
+
+    /* TODO: Cases not yet examined.  */
+    else if (TARGET_SEH)
+      disable_outline_msabi_xlogues (&warned_seh,
+				     "Structured Exception Handling (SEH)");
+    else if (crtl->calls_eh_return)
+      disable_outline_msabi_xlogues (NULL, "__builtin_eh_return");
+
+    else if (ix86_static_chain_on_stack)
+      disable_outline_msabi_xlogues (NULL, "static call chains");
+
+    else if (ix86_using_red_zone ())
+      disable_outline_msabi_xlogues (NULL, "red zones");
+
+    else if (flag_split_stack)
+      disable_outline_msabi_xlogues (NULL, "split stack");
+
+    /* Finally, compute which registers the stub will manage.  */
+    else
+      {
+	unsigned count = xlogue_layout
+			 ::compute_stub_managed_regs (stub_managed_regs);
+	m->outline_ms_sysv_extra_regs = count - xlogue_layout::MIN_REGS;
+      }
+  }
+
   frame->nregs = ix86_nsaved_regs ();
   frame->nsseregs = ix86_nsaved_sseregs ();
-  CLEAR_HARD_REG_SET (stub_managed_regs);
+  m->outline_ms_sysv_pad_in = 0;
+  m->outline_ms_sysv_pad_out = 0;
 
   /* 64-bit MS ABI seem to require stack alignment to be always 16,
      except for function prologues, leaf functions and when the defult
@@ -12762,8 +12841,26 @@ ix86_compute_frame_layout (struct ix86_frame *frame)
     offset = ROUND_UP (offset, stack_alignment_needed);
   frame->stack_realign_offset = offset;
 
+  if (TARGET_64BIT && m->outline_ms_sysv)
+    {
+      gcc_assert (stack_alignment_needed >= 16);
+      gcc_assert (!frame->nsseregs);
+
+      m->outline_ms_sysv_pad_in = !!(offset & UNITS_PER_WORD);
+
+      /* Select an appropriate layout for incoming stack offset.  */
+      const struct xlogue_layout &xlogue = xlogue_layout::get_instance ();
+
+      if ((offset + xlogue.get_stack_space_used ()) & UNITS_PER_WORD)
+	m->outline_ms_sysv_pad_out = 1;
+
+      offset += xlogue.get_stack_space_used ();
+      gcc_assert (!(offset & 0xf));
+      frame->outlined_save_offset = offset;
+    }
+
   /* Align and set SSE register save area.  */
-  if (frame->nsseregs)
+  else if (frame->nsseregs)
     {
       /* The only ABI that has saved SSE registers (Win64) also has a
 	 16-byte aligned default stack.  However, many programs violate
-- 
2.11.0

[PATCH 7/8] [i386] Add msabi pro/epilogue stubs to libgcc

[Daniel Santos]

Adds libgcc/config/i386/i386-asm.h to manage common cpp and gas macros. Adds
assembly stubs.  stubs use the following naming convention:

  (sav|res)ms64[f][x]

    save|res    Save or restore
    ms64        Avoid possible name collisions with future stubs
                (specific to 64-bit msabi --> sysv scenario)
    [f]         Variant for hard frame pointer (and stack realignment)
    [x]         Tail-call variant (is the return from function)

Signed-off-by: Daniel Santos <daniel.santos@pobox.com>
---
 libgcc/config.host             |  2 +-
 libgcc/config/i386/i386-asm.h  | 82 ++++++++++++++++++++++++++++++++++++++++++
 libgcc/config/i386/resms64.S   | 57 +++++++++++++++++++++++++++++
 libgcc/config/i386/resms64f.S  | 55 ++++++++++++++++++++++++++++
 libgcc/config/i386/resms64fx.S | 57 +++++++++++++++++++++++++++++
 libgcc/config/i386/resms64x.S  | 59 ++++++++++++++++++++++++++++++
 libgcc/config/i386/savms64.S   | 57 +++++++++++++++++++++++++++++
 libgcc/config/i386/savms64f.S  | 55 ++++++++++++++++++++++++++++
 libgcc/config/i386/t-msabi     |  7 ++++
 9 files changed, 430 insertions(+), 1 deletion(-)
 create mode 100644 libgcc/config/i386/i386-asm.h
 create mode 100644 libgcc/config/i386/resms64.S
 create mode 100644 libgcc/config/i386/resms64f.S
 create mode 100644 libgcc/config/i386/resms64fx.S
 create mode 100644 libgcc/config/i386/resms64x.S
 create mode 100644 libgcc/config/i386/savms64.S
 create mode 100644 libgcc/config/i386/savms64f.S
 create mode 100644 libgcc/config/i386/t-msabi

diff --git a/libgcc/config.host b/libgcc/config.host
index 540bfa96358..6c497b13a27 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -1339,7 +1339,7 @@ case ${host} in
 i[34567]86-*-linux* | x86_64-*-linux* | \
   i[34567]86-*-kfreebsd*-gnu | x86_64-*-kfreebsd*-gnu | \
   i[34567]86-*-gnu*)
-	tmake_file="${tmake_file} t-tls i386/t-linux t-slibgcc-libgcc"
+	tmake_file="${tmake_file} t-tls i386/t-linux i386/t-msabi t-slibgcc-libgcc"
 	if test "$libgcc_cv_cfi" = "yes"; then
 		tmake_file="${tmake_file} t-stack i386/t-stack-i386"
 	fi
diff --git a/libgcc/config/i386/i386-asm.h b/libgcc/config/i386/i386-asm.h
new file mode 100644
index 00000000000..c613e9fd83d
--- /dev/null
+++ b/libgcc/config/i386/i386-asm.h
@@ -0,0 +1,82 @@
+/* Defines common perprocessor and assembly macros for use by various stubs.
+   Copyright (C) 2016-2017 Free Software Foundation, Inc.
+   Contributed by Daniel Santos <daniel.santos@pobox.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef I386_ASM_H
+#define I386_ASM_H
+
+#ifdef __ELF__
+# define ELFFN(fn) .type fn,@function
+#else
+# define ELFFN(fn)
+#endif
+
+#define FUNC_START(fn)	\
+	.global fn;	\
+	ELFFN (fn);	\
+fn:
+
+#define HIDDEN_FUNC(fn)\
+	FUNC_START (fn)	\
+	.hidden fn;	\
+
+#define FUNC_END(fn) .size fn,.-fn
+
+#ifdef __SSE2__
+# ifdef __AVX__
+#  define MOVAPS vmovaps
+# else
+#  define MOVAPS movaps
+# endif
+
+/* Save SSE registers 6-15. off is the offset of rax to get to xmm6.  */
+.macro SSE_SAVE off=0
+	MOVAPS %xmm15,(\off - 0x90)(%rax)
+	MOVAPS %xmm14,(\off - 0x80)(%rax)
+	MOVAPS %xmm13,(\off - 0x70)(%rax)
+	MOVAPS %xmm12,(\off - 0x60)(%rax)
+	MOVAPS %xmm11,(\off - 0x50)(%rax)
+	MOVAPS %xmm10,(\off - 0x40)(%rax)
+	MOVAPS %xmm9, (\off - 0x30)(%rax)
+	MOVAPS %xmm8, (\off - 0x20)(%rax)
+	MOVAPS %xmm7, (\off - 0x10)(%rax)
+	MOVAPS %xmm6, \off(%rax)
+.endm
+
+/* Restore SSE registers 6-15. off is the offset of rsi to get to xmm6.  */
+.macro SSE_RESTORE off=0
+	MOVAPS (\off - 0x90)(%rsi), %xmm15
+	MOVAPS (\off - 0x80)(%rsi), %xmm14
+	MOVAPS (\off - 0x70)(%rsi), %xmm13
+	MOVAPS (\off - 0x60)(%rsi), %xmm12
+	MOVAPS (\off - 0x50)(%rsi), %xmm11
+	MOVAPS (\off - 0x40)(%rsi), %xmm10
+	MOVAPS (\off - 0x30)(%rsi), %xmm9
+	MOVAPS (\off - 0x20)(%rsi), %xmm8
+	MOVAPS (\off - 0x10)(%rsi), %xmm7
+	MOVAPS \off(%rsi), %xmm6
+.endm
+
+#endif /* __SSE2__ */
+#endif /* I386_ASM_H */
diff --git a/libgcc/config/i386/resms64.S b/libgcc/config/i386/resms64.S
new file mode 100644
index 00000000000..f47e2f066fb
--- /dev/null
+++ b/libgcc/config/i386/resms64.S
@@ -0,0 +1,57 @@
+/* Epilogue stub for 64-bit ms/sysv clobbers: restore
+   Copyright (C) 2016-2017 Free Software Foundation, Inc.
+   Contributed by Daniel Santos <daniel.santos@pobox.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifdef __x86_64__
+#include "i386-asm.h"
+
+/* Epilogue routine for restoring 64-bit ms/sysv registers.  */
+
+	.text
+HIDDEN_FUNC(__resms64_18)
+	mov	-0x70(%rsi),%r15
+HIDDEN_FUNC(__resms64_17)
+	mov	-0x68(%rsi),%r14
+HIDDEN_FUNC(__resms64_16)
+	mov	-0x60(%rsi),%r13
+HIDDEN_FUNC(__resms64_15)
+	mov	-0x58(%rsi),%r12
+HIDDEN_FUNC(__resms64_14)
+	mov	-0x50(%rsi),%rbp
+HIDDEN_FUNC(__resms64_13)
+	mov	-0x48(%rsi),%rbx
+HIDDEN_FUNC(__resms64_12)
+	mov	-0x40(%rsi),%rdi
+	SSE_RESTORE off=0x60
+	mov	-0x38(%rsi),%rsi
+	ret
+FUNC_END(__resms64_12)
+FUNC_END(__resms64_13)
+FUNC_END(__resms64_14)
+FUNC_END(__resms64_15)
+FUNC_END(__resms64_16)
+FUNC_END(__resms64_17)
+FUNC_END(__resms64_18)
+
+#endif /* __x86_64__ */
diff --git a/libgcc/config/i386/resms64f.S b/libgcc/config/i386/resms64f.S
new file mode 100644
index 00000000000..817da60cf15
--- /dev/null
+++ b/libgcc/config/i386/resms64f.S
@@ -0,0 +1,55 @@
+/* Epilogue stub for 64-bit ms/sysv clobbers: restore (with hard frame pointer)
+   Copyright (C) 2016-2017 Free Software Foundation, Inc.
+   Contributed by Daniel Santos <daniel.santos@pobox.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifdef __x86_64__
+#include "i386-asm.h"
+
+/* Epilogue routine for restoring 64-bit ms/sysv registers when hard frame
+   pointer is used.  */
+
+	.text
+HIDDEN_FUNC(__resms64f_17)
+	mov	-0x68(%rsi),%r15
+HIDDEN_FUNC(__resms64f_16)
+	mov	-0x60(%rsi),%r14
+HIDDEN_FUNC(__resms64f_15)
+	mov	-0x58(%rsi),%r13
+HIDDEN_FUNC(__resms64f_14)
+	mov	-0x50(%rsi),%r12
+HIDDEN_FUNC(__resms64f_13)
+	mov	-0x48(%rsi),%rbx
+HIDDEN_FUNC(__resms64f_12)
+	mov	-0x40(%rsi),%rdi
+	SSE_RESTORE off=0x60
+	mov	-0x38(%rsi),%rsi
+	ret
+FUNC_END(__resms64f_12)
+FUNC_END(__resms64f_13)
+FUNC_END(__resms64f_14)
+FUNC_END(__resms64f_15)
+FUNC_END(__resms64f_16)
+FUNC_END(__resms64f_17)
+
+#endif /* __x86_64__ */
diff --git a/libgcc/config/i386/resms64fx.S b/libgcc/config/i386/resms64fx.S
new file mode 100644
index 00000000000..5dba5848dee
--- /dev/null
+++ b/libgcc/config/i386/resms64fx.S
@@ -0,0 +1,57 @@
+/* Epilogue stub for 64-bit ms/sysv clobbers: restore, leave and return
+   Copyright (C) 2016-2017 Free Software Foundation, Inc.
+   Contributed by Daniel Santos <daniel.santos@pobox.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifdef __x86_64__
+#include "i386-asm.h"
+
+/* Epilogue routine for 64-bit ms/sysv registers when hard frame pointer
+ * used -- restores registers, restores frame pointer and then returns
+ * from the function.  */
+
+	.text
+HIDDEN_FUNC(__resms64fx_17)
+	mov	-0x68(%rsi),%r15
+HIDDEN_FUNC(__resms64fx_16)
+	mov	-0x60(%rsi),%r14
+HIDDEN_FUNC(__resms64fx_15)
+	mov	-0x58(%rsi),%r13
+HIDDEN_FUNC(__resms64fx_14)
+	mov	-0x50(%rsi),%r12
+HIDDEN_FUNC(__resms64fx_13)
+	mov	-0x48(%rsi),%rbx
+HIDDEN_FUNC(__resms64fx_12)
+	mov	-0x40(%rsi),%rdi
+	SSE_RESTORE off=0x60
+	mov	-0x38(%rsi),%rsi
+	leaveq
+	ret
+FUNC_END(__resms64fx_12)
+FUNC_END(__resms64fx_13)
+FUNC_END(__resms64fx_14)
+FUNC_END(__resms64fx_15)
+FUNC_END(__resms64fx_16)
+FUNC_END(__resms64fx_17)
+
+#endif /* __x86_64__ */
diff --git a/libgcc/config/i386/resms64x.S b/libgcc/config/i386/resms64x.S
new file mode 100644
index 00000000000..7770447cf38
--- /dev/null
+++ b/libgcc/config/i386/resms64x.S
@@ -0,0 +1,59 @@
+/* Epilogue stub for 64-bit ms/sysv clobbers: restore and return
+   Copyright (C) 2016-2017 Free Software Foundation, Inc.
+   Contributed by Daniel Santos <daniel.santos@pobox.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifdef __x86_64__
+#include "i386-asm.h"
+
+/* Epilogue routine for restoring 64-bit ms/sysv registers and returning from
+ * function.  */
+
+	.text
+HIDDEN_FUNC(__resms64x_18)
+	mov	-0x70(%rsi),%r15
+HIDDEN_FUNC(__resms64x_17)
+	mov	-0x68(%rsi),%r14
+HIDDEN_FUNC(__resms64x_16)
+	mov	-0x60(%rsi),%r13
+HIDDEN_FUNC(__resms64x_15)
+	mov	-0x58(%rsi),%r12
+HIDDEN_FUNC(__resms64x_14)
+	mov	-0x50(%rsi),%rbp
+HIDDEN_FUNC(__resms64x_13)
+	mov	-0x48(%rsi),%rbx
+HIDDEN_FUNC(__resms64x_12)
+	mov	-0x40(%rsi),%rdi
+	SSE_RESTORE off=0x60
+	mov	-0x38(%rsi),%rsi
+	mov	%r10,%rsp
+	ret
+FUNC_END(__resms64x_12)
+FUNC_END(__resms64x_13)
+FUNC_END(__resms64x_14)
+FUNC_END(__resms64x_15)
+FUNC_END(__resms64x_16)
+FUNC_END(__resms64x_17)
+FUNC_END(__resms64x_18)
+
+#endif /* __x86_64__ */
diff --git a/libgcc/config/i386/savms64.S b/libgcc/config/i386/savms64.S
new file mode 100644
index 00000000000..2067dd8614f
--- /dev/null
+++ b/libgcc/config/i386/savms64.S
@@ -0,0 +1,57 @@
+/* Prologue stub for 64-bit ms/sysv clobbers: save
+   Copyright (C) 2016-2017 Free Software Foundation, Inc.
+   Contributed by Daniel Santos <daniel.santos@pobox.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifdef __x86_64__
+#include "i386-asm.h"
+
+/* Prologue routine for saving 64-bit ms/sysv registers.  */
+
+	.text
+HIDDEN_FUNC(__savms64_18)
+	mov	%r15,-0x70(%rax)
+HIDDEN_FUNC(__savms64_17)
+	mov	%r14,-0x68(%rax)
+HIDDEN_FUNC(__savms64_16)
+	mov	%r13,-0x60(%rax)
+HIDDEN_FUNC(__savms64_15)
+	mov	%r12,-0x58(%rax)
+HIDDEN_FUNC(__savms64_14)
+	mov	%rbp,-0x50(%rax)
+HIDDEN_FUNC(__savms64_13)
+	mov	%rbx,-0x48(%rax)
+HIDDEN_FUNC(__savms64_12)
+	mov	%rdi,-0x40(%rax)
+	mov	%rsi,-0x38(%rax)
+	SSE_SAVE off=0x60
+	ret
+FUNC_END(__savms64_12)
+FUNC_END(__savms64_13)
+FUNC_END(__savms64_14)
+FUNC_END(__savms64_15)
+FUNC_END(__savms64_16)
+FUNC_END(__savms64_17)
+FUNC_END(__savms64_18)
+
+#endif /* __x86_64__ */
diff --git a/libgcc/config/i386/savms64f.S b/libgcc/config/i386/savms64f.S
new file mode 100644
index 00000000000..81583b6eb68
--- /dev/null
+++ b/libgcc/config/i386/savms64f.S
@@ -0,0 +1,55 @@
+/* Prologue stub for 64-bit ms/sysv clobbers: save (with hard frame pointer)
+   Copyright (C) 2016-2017 Free Software Foundation, Inc.
+   Contributed by Daniel Santos <daniel.santos@pobox.com>
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifdef __x86_64__
+#include "i386-asm.h"
+
+/* Prologue routine for saving 64-bit ms/sysv registers when realignment is
+ * needed or hard frame pointer used.  */
+
+	.text
+HIDDEN_FUNC(__savms64f_17)
+	mov	%r15,-0x68(%rax)
+HIDDEN_FUNC(__savms64f_16)
+	mov	%r14,-0x60(%rax)
+HIDDEN_FUNC(__savms64f_15)
+	mov	%r13,-0x58(%rax)
+HIDDEN_FUNC(__savms64f_14)
+	mov	%r12,-0x50(%rax)
+HIDDEN_FUNC(__savms64f_13)
+	mov	%rbx,-0x48(%rax)
+HIDDEN_FUNC(__savms64f_12)
+	mov	%rdi,-0x40(%rax)
+	mov	%rsi,-0x38(%rax)
+	SSE_SAVE off=0x60
+	ret
+FUNC_END(__savms64f_12)
+FUNC_END(__savms64f_13)
+FUNC_END(__savms64f_14)
+FUNC_END(__savms64f_15)
+FUNC_END(__savms64f_16)
+FUNC_END(__savms64f_17)
+
+#endif /* __x86_64__ */
diff --git a/libgcc/config/i386/t-msabi b/libgcc/config/i386/t-msabi
new file mode 100644
index 00000000000..dbb0fa0a697
--- /dev/null
+++ b/libgcc/config/i386/t-msabi
@@ -0,0 +1,7 @@
+# Makefile fragment to support -foutline-msabi-xlogue
+LIB2ADD_ST += $(srcdir)/config/i386/savms64.S \
+	      $(srcdir)/config/i386/resms64.S \
+	      $(srcdir)/config/i386/resms64x.S \
+	      $(srcdir)/config/i386/savms64f.S \
+	      $(srcdir)/config/i386/resms64f.S \
+	      $(srcdir)/config/i386/resms64fx.S
-- 
2.11.0

[PATCH 3/8] [i386] Adds class xlouge_layout and new fields to struct machine_function

[Daniel Santos]

Of the new fields added to struct machine_function, outline_ms_sysv is
initially set in ix86_expand_call, but may later be cleared when
ix86_compute_frame_layout is called (both of these are in subsequent
patch).  If it is not cleared, then the remaining new fields will be
set.

The new class xlouge_layout manages the layout of the stack area used by
the out-of-line save & restore stubs as well as any padding needed
before and after the save area.  It also provides the proper symbol rtx
for the requested stub based upon values of the new fields in struct
machine_function.

xlouge_layout cannot be used until stack realign flags are finalized and
ix86_compute_frame_layout is called, at which point
xlouge_layout::get_instance may be used to retrieve the appropriate
(constant) instance of xlouge_layout.

Signed-off-by: Daniel Santos <daniel.santos@pobox.com>
---
 gcc/config/i386/i386.c | 252 +++++++++++++++++++++++++++++++++++++++++++++++++
 gcc/config/i386/i386.h |  18 ++++
 2 files changed, 270 insertions(+)

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 9a0dfdc77ba..663a8c1b1ed 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -91,6 +91,7 @@ static rtx legitimize_dllimport_symbol (rtx, bool);
 static rtx legitimize_pe_coff_extern_decl (rtx, bool);
 static rtx legitimize_pe_coff_symbol (rtx, bool);
 static void ix86_print_operand_address_as (FILE *, rtx, addr_space_t, bool);
+static bool ix86_save_reg (unsigned int, bool, bool);
 
 #ifndef CHECK_STACK_LIMIT
 #define CHECK_STACK_LIMIT (-1)
@@ -2430,6 +2431,257 @@ unsigned const x86_64_ms_sysv_extra_clobbered_registers[12] =
   XMM12_REG, XMM13_REG, XMM14_REG, XMM15_REG
 };
 
+enum xlogue_stub {
+  XLOGUE_STUB_SAVE,
+  XLOGUE_STUB_RESTORE,
+  XLOGUE_STUB_RESTORE_TAIL,
+  XLOGUE_STUB_SAVE_HFP,
+  XLOGUE_STUB_RESTORE_HFP,
+  XLOGUE_STUB_RESTORE_HFP_TAIL,
+
+  XLOGUE_STUB_COUNT
+};
+
+enum xlogue_stub_sets {
+  XLOGUE_SET_ALIGNED,
+  XLOGUE_SET_ALIGNED_PLUS_8,
+  XLOGUE_SET_HFP_ALIGNED_OR_REALIGN,
+  XLOGUE_SET_HFP_ALIGNED_PLUS_8,
+
+  XLOGUE_SET_COUNT
+};
+
+/* Register save/restore layout used by an out-of-line stubs.  */
+class xlogue_layout {
+public:
+  struct reginfo
+  {
+    unsigned regno;
+    HOST_WIDE_INT offset;	/* Offset used by stub base pointer (rax or
+				   rsi) to where each register is stored.  */
+  };
+
+  unsigned get_nregs () const			{return m_nregs;}
+  HOST_WIDE_INT get_stack_align_off_in () const	{return m_stack_align_off_in;}
+
+  const reginfo &get_reginfo (unsigned reg) const
+  {
+    gcc_assert (reg < m_nregs);
+    return m_regs[reg];
+  }
+
+  /* Returns an rtx for the stub's symbol based upon
+       1.) the specified stub (save, restore or restore_ret) and
+       2.) the value of cfun->machine->outline_ms_sysv_extra_regs and
+       3.) rather or not stack alignment is being performed.  */
+  rtx get_stub_rtx (enum xlogue_stub stub) const;
+
+  /* Returns the amount of stack space (including padding) that the stub
+     needs to store registers based upon data in the machine_function.  */
+  HOST_WIDE_INT get_stack_space_used () const
+  {
+    const struct machine_function &m = *cfun->machine;
+    unsigned last_reg = m.outline_ms_sysv_extra_regs + MIN_REGS - 1;
+
+    gcc_assert (m.outline_ms_sysv_extra_regs <= MAX_EXTRA_REGS);
+    return m_regs[last_reg].offset
+	    + (m.outline_ms_sysv_pad_out ? 8 : 0)
+	    + STUB_INDEX_OFFSET;
+  }
+
+  /* Returns the offset for the base pointer used by the stub.  */
+  HOST_WIDE_INT get_stub_ptr_offset () const
+  {
+    return STUB_INDEX_OFFSET + m_stack_align_off_in;
+  }
+
+  static const struct xlogue_layout &get_instance ();
+  static unsigned compute_stub_managed_regs (HARD_REG_SET &stub_managed_regs);
+
+  static const HOST_WIDE_INT STUB_INDEX_OFFSET = 0x70;
+  static const unsigned MIN_REGS = NUM_X86_64_MS_CLOBBERED_REGS;
+  static const unsigned MAX_REGS = 18;
+  static const unsigned MAX_EXTRA_REGS = MAX_REGS - MIN_REGS;
+  static const unsigned VARIANT_COUNT = MAX_EXTRA_REGS + 1;
+  static const unsigned STUB_NAME_MAX_LEN = 16;
+  static const char * const STUB_BASE_NAMES[XLOGUE_STUB_COUNT];
+  static const unsigned REG_ORDER[MAX_REGS];
+  static const unsigned REG_ORDER_REALIGN[MAX_REGS];
+
+private:
+  xlogue_layout ();
+  xlogue_layout (HOST_WIDE_INT stack_align_off_in, bool hfp);
+  xlogue_layout (const xlogue_layout &);
+
+  /* True if hard frame pointer is used.  */
+  bool m_hfp;
+
+  /* Max number of register this layout manages.  */
+  unsigned m_nregs;
+
+  /* Incoming offset from 16-byte alignment.  */
+  HOST_WIDE_INT m_stack_align_off_in;
+  struct reginfo m_regs[MAX_REGS];
+  rtx m_syms[XLOGUE_STUB_COUNT][VARIANT_COUNT];
+  char m_stub_names[XLOGUE_STUB_COUNT][VARIANT_COUNT][STUB_NAME_MAX_LEN];
+
+  static const struct xlogue_layout GTY(()) s_instances[XLOGUE_SET_COUNT];
+};
+
+const char * const xlogue_layout::STUB_BASE_NAMES[XLOGUE_STUB_COUNT] = {
+  "savms64",
+  "resms64",
+  "resms64x",
+  "savms64f",
+  "resms64f",
+  "resms64fx"
+};
+
+const unsigned xlogue_layout::REG_ORDER[xlogue_layout::MAX_REGS] = {
+/* The below offset values are where each register is stored for the layout
+   relative to incoming stack pointer.  The value of each m_regs[].offset will
+   be relative to the incoming base pointer (rax or rsi) used by the stub.
+
+    s_instances:   0		1		2		3
+    Offset:					realigned or	aligned + 8
+    Register	   aligned	aligned + 8	aligned w/HFP	w/HFP	*/
+    XMM15_REG,	/* 0x10		0x18		0x10		0x18	*/
+    XMM14_REG,	/* 0x20		0x28		0x20		0x28	*/
+    XMM13_REG,	/* 0x30		0x38		0x30		0x38	*/
+    XMM12_REG,	/* 0x40		0x48		0x40		0x48	*/
+    XMM11_REG,	/* 0x50		0x58		0x50		0x58	*/
+    XMM10_REG,	/* 0x60		0x68		0x60		0x68	*/
+    XMM9_REG,	/* 0x70		0x78		0x70		0x78	*/
+    XMM8_REG,	/* 0x80		0x88		0x80		0x88	*/
+    XMM7_REG,	/* 0x90		0x98		0x90		0x98	*/
+    XMM6_REG,	/* 0xa0		0xa8		0xa0		0xa8	*/
+    SI_REG,	/* 0xa8		0xb0		0xa8		0xb0	*/
+    DI_REG,	/* 0xb0		0xb8		0xb0		0xb8	*/
+    BX_REG,	/* 0xb8		0xc0		0xb8		0xc0	*/
+    BP_REG,	/* 0xc0		0xc8		N/A		N/A	*/
+    R12_REG,	/* 0xc8		0xd0		0xc0		0xc8	*/
+    R13_REG,	/* 0xd0		0xd8		0xc8		0xd0	*/
+    R14_REG,	/* 0xd8		0xe0		0xd0		0xd8	*/
+    R15_REG,	/* 0xe0		0xe8		0xd8		0xe0	*/
+};
+
+const struct xlogue_layout GTY(())
+xlogue_layout::s_instances[XLOGUE_SET_COUNT] = {
+  xlogue_layout (0, false),
+  xlogue_layout (8, false),
+  xlogue_layout (0, true),
+  xlogue_layout (8, true)
+};
+
+const struct xlogue_layout &xlogue_layout::get_instance ()
+{
+  enum xlogue_stub_sets stub_set;
+  bool aligned_plus_8 = cfun->machine->outline_ms_sysv_pad_in;
+
+  if (stack_realign_fp)
+    stub_set = XLOGUE_SET_HFP_ALIGNED_OR_REALIGN;
+  else if (frame_pointer_needed)
+    stub_set = aligned_plus_8
+	      ? XLOGUE_SET_HFP_ALIGNED_PLUS_8
+	      : XLOGUE_SET_HFP_ALIGNED_OR_REALIGN;
+  else
+    stub_set = aligned_plus_8 ? XLOGUE_SET_ALIGNED_PLUS_8 : XLOGUE_SET_ALIGNED;
+
+  return s_instances[stub_set];
+}
+
+unsigned
+xlogue_layout::compute_stub_managed_regs (HARD_REG_SET &stub_managed_regs)
+{
+  bool hfp = frame_pointer_needed || stack_realign_fp;
+
+  unsigned i, count;
+  unsigned regno;
+
+  for (i = 0; i < NUM_X86_64_MS_CLOBBERED_REGS; ++i)
+    {
+      regno = x86_64_ms_sysv_extra_clobbered_registers[i];
+      if (regno == BP_REG && hfp)
+	continue;
+      if (!ix86_save_reg (regno, false, false))
+	return 0;
+    }
+
+  for (count = i = 0; i < MAX_REGS; ++i)
+    {
+      regno = REG_ORDER[i];
+      if (regno == BP_REG && hfp)
+	continue;
+      if (!ix86_save_reg (regno, false, false))
+	break;
+      add_to_hard_reg_set (&stub_managed_regs, DImode, regno);
+      ++count;
+    }
+    gcc_assert (count >= MIN_REGS && count <= MAX_REGS);
+    return count;
+}
+
+xlogue_layout::xlogue_layout (HOST_WIDE_INT stack_align_off_in, bool hfp)
+  : m_hfp (hfp) , m_nregs (hfp ? 17 : 18),
+    m_stack_align_off_in (stack_align_off_in)
+{
+  memset (m_regs, 0, sizeof (m_regs));
+  memset (m_syms, 0, sizeof (m_syms));
+  memset (m_stub_names, 0, sizeof (m_stub_names));
+
+  HOST_WIDE_INT offset = stack_align_off_in;
+  unsigned i, j;
+  for (i = j = 0; i < MAX_REGS; ++i)
+    {
+      unsigned regno = REG_ORDER[i];
+
+      if (regno == BP_REG && hfp)
+	continue;
+      if (SSE_REGNO_P (regno))
+	{
+	  offset += 16;
+	  /* Verify that SSE regs are always aligned.  */
+	  gcc_assert (!((stack_align_off_in + offset) & 15));
+	}
+      else
+	offset += 8;
+
+      m_regs[j].regno    = regno;
+      m_regs[j++].offset = offset - STUB_INDEX_OFFSET;
+    }
+    gcc_assert (j == m_nregs);
+}
+
+rtx xlogue_layout::get_stub_rtx (enum xlogue_stub stub) const
+{
+  const unsigned n_extra_regs = cfun->machine->outline_ms_sysv_extra_regs;
+  gcc_assert (n_extra_regs <= MAX_EXTRA_REGS);
+  gcc_assert (stub < XLOGUE_STUB_COUNT);
+
+  gcc_assert (crtl->stack_realign_finalized);
+
+  /* FIXME: For some reason, cached symbols go bad, so disable it for now.
+     Should we just remove the rtx cache or do we need to reset it at some
+     point? */
+  if (true || !m_syms[stub][n_extra_regs])
+    {
+      xlogue_layout *writey_this = const_cast<xlogue_layout*>(this);
+      char *stub_name = writey_this->m_stub_names[stub][n_extra_regs];
+      rtx sym;
+      int res;
+
+      res = snprintf (stub_name, STUB_NAME_MAX_LEN - 1, "__%s_%u",
+		      STUB_BASE_NAMES[stub], 12 + n_extra_regs);
+      gcc_assert (res <= (int)STUB_NAME_MAX_LEN);
+
+      sym = gen_rtx_SYMBOL_REF (Pmode, stub_name);
+      writey_this->m_syms[stub][n_extra_regs] = sym;
+    }
+
+    gcc_assert (m_syms[stub][n_extra_regs]);
+    return m_syms[stub][n_extra_regs];
+}
+
 /* Define the structure for the machine field in struct function.  */
 
 struct GTY(()) stack_local_entry {
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index ed7e4edec56..a79237dbdf0 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -2577,6 +2577,24 @@ struct GTY(()) machine_function {
      pass arguments and can be used for indirect sibcall.  */
   BOOL_BITFIELD arg_reg_available : 1;
 
+  /* If true, we're out-of-lining reg save/restore for regs clobbered
+     by ms_abi functions calling a sysv function.  */
+  BOOL_BITFIELD outline_ms_sysv : 1;
+
+  /* If true, the incoming 16-byte aligned stack has an offset (of 8) and
+     needs padding.  */
+  BOOL_BITFIELD outline_ms_sysv_pad_in : 1;
+
+  /* If true, the size of the stub save area plus inline int reg saves will
+     result in an 8 byte offset, so needs padding.  */
+  BOOL_BITFIELD outline_ms_sysv_pad_out : 1;
+
+  /* This is the number of extra registers saved by stub (valid range is
+     0-6). Each additional register is only saved/restored by the stubs
+     if all successive ones are. (Will always be zero when using a hard
+     frame pointer.) */
+  unsigned int outline_ms_sysv_extra_regs:3;
+
   /* During prologue/epilogue generation, the current frame state.
      Otherwise, the frame state at the end of the prologue.  */
   struct machine_frame_state fs;
-- 
2.11.0