From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 28892 invoked by alias); 2 Jul 2009 04:59:44 -0000 Received: (qmail 28875 invoked by uid 22791); 2 Jul 2009 04:59:43 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=AWL,BAYES_00,SARE_MSGID_LONG40,SPF_PASS X-Spam-Check-By: sourceware.org Received: from mail-gx0-f217.google.com (HELO mail-gx0-f217.google.com) (209.85.217.217) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 02 Jul 2009 04:59:37 +0000 Received: by gxk17 with SMTP id 17so2078012gxk.8 for ; Wed, 01 Jul 2009 21:59:35 -0700 (PDT) MIME-Version: 1.0 Received: by 10.100.34.10 with SMTP id h10mr9181662anh.182.1246510775127; Wed, 01 Jul 2009 21:59:35 -0700 (PDT) From: Mohamed Shafi Date: Thu, 02 Jul 2009 04:59:00 -0000 Message-ID: Subject: About feasibility of implementing an instruction To: GCC Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org X-SW-Source: 2009-07/txt/msg00036.txt.bz2 Hello all, I just want to know about the feasibility of implementing an instruction for a port in gcc 4.4 The target has 40 bit register where the normal load/store/move instructions will be able to access the 32 bits of the register. In order to move data into the rest of the register [b32 to b39] the data has to be stored into a 32bit memory location. The data should be stored in such a way that if it is stored for 0-7 in memory the data can be moved to b32-b39 of a even register and if the data in the memory is stored in 16-23 of the memory word then it can be moved to b32-b39 of a odd register. Hope i make myself clear. Will it be possible to implement this in the gcc back-end so that the particular instruction is supported? Regards, Shafi