From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 5401 invoked by alias); 15 Aug 2009 04:11:09 -0000 Received: (qmail 5348 invoked by uid 22791); 15 Aug 2009 04:11:07 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=AWL,BAYES_00,SARE_MSGID_LONG40,SPF_PASS X-Spam-Check-By: sourceware.org Received: from mail-pz0-f202.google.com (HELO mail-pz0-f202.google.com) (209.85.222.202) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Sat, 15 Aug 2009 04:11:03 +0000 Received: by pzk40 with SMTP id 40so1226861pzk.14 for ; Fri, 14 Aug 2009 21:11:01 -0700 (PDT) MIME-Version: 1.0 Received: by 10.141.41.18 with SMTP id t18mr1303104rvj.264.1250309461223; Fri, 14 Aug 2009 21:11:01 -0700 (PDT) In-Reply-To: References: From: Mohamed Shafi Date: Sat, 15 Aug 2009 07:31:00 -0000 Message-ID: Subject: Re: About feasibility of implementing an instruction To: Ian Lance Taylor Cc: GCC Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org X-SW-Source: 2009-08/txt/msg00255.txt.bz2 2009/7/3 Ian Lance Taylor : > Mohamed Shafi writes: > >> I just want to know about the feasibility of implementing an >> instruction for a port in gcc 4.4 >> The target has 40 bit register where the normal load/store/move >> instructions will be able to access the 32 bits of the register. In >> order to move data into the rest of the register [b32 to b39] the data >> has to be stored into a 32bit memory location. The data should be >> stored in such a way that if it is stored for 0-7 in memory the data >> can be moved to b32-b39 of a even register and if the data in the >> memory is stored in 16-23 of the memory word then it can be moved to >> b32-b39 of a odd register. Hope i make myself clear. >> >> Will it be possible to implement this in the gcc back-end so that the >> particular instruction is supported? > > In general, the gcc backend can do anything, so, yes, this can be > supported. =A0It sounds like this is not a general purpose register, so I > would probably do it using a builtin function. =A0If you need to treat it > as a general purpose register (i.e., the register is managed by the > register allocator) then you will need a secondary reload to handle > this. > This is a general purpose register. All the 40 bits are used only for fixed-point data types. When the register is used for fixed-point data type all the operations except initialization, are done through built-in functions. For initialization the immediate value should move through a memory ..i.e there is no immediate load when the data is 40bit. So i am planning to control this using LEGITIMATE_CONSTANT macro. But then i have a question. If all the operations are through intrinsics will there be a need for spilling for the variables used in the built-in functions? If so then depending on the register that get spilled is even or odd [b32 to b39] of the register gets stored in the memory to [b0 to b7] or [b16 tr b23] respectively. Will i be able to keep track of the spilling so that i can reload into the proper register? Hope i am clear. Regards Shafi