From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 8493 invoked by alias); 14 Sep 2009 14:24:38 -0000 Received: (qmail 8480 invoked by uid 22791); 14 Sep 2009 14:24:37 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=AWL,BAYES_00,SARE_MSGID_LONG40,SPF_PASS X-Spam-Check-By: sourceware.org Received: from mail-pz0-f186.google.com (HELO mail-pz0-f186.google.com) (209.85.222.186) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 14 Sep 2009 14:24:31 +0000 Received: by pzk16 with SMTP id 16so2624669pzk.18 for ; Mon, 14 Sep 2009 07:24:30 -0700 (PDT) MIME-Version: 1.0 Received: by 10.142.195.6 with SMTP id s6mr454574wff.48.1252938269118; Mon, 14 Sep 2009 07:24:29 -0700 (PDT) From: Mohamed Shafi Date: Mon, 14 Sep 2009 14:24:00 -0000 Message-ID: Subject: How to split 40bit data types load/store? To: GCC Content-Type: text/plain; charset=ISO-8859-1 Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org X-SW-Source: 2009-09/txt/msg00246.txt.bz2 Hello all, I am doing a port for a 32bit target in GCC 4.4.0. I have to support a 40bit data (_Accum) in the port. The target has 40bit registers which is a GPR and works as 32bit reg in other modes. The load and store for _Accum happens in two step. The lower 32bit in one instruction and the upper 8bit in the next instruction. I want to split the instruction after reload. I tired to have a pattern (for load) like this: (define_insn "fn_load_ext_sa" [(set (unspec:SA [(match_operand:DA 0 "register_operand" "")] UNSPEC_FN_EXT) (match_operand:SA 1 "memory_operand" ""))] (define_insn "fn_load_sa" [(set (unspec:SA [(match_operand:DA 0 "register_operand" "")] UNSPEC_FN) (match_operand:SA 1 "memory_operand" ""))] The above patterns works for O0. But with optimizations i am getting ICE. It seems that GCC won't accept unspec object in destination operand. So how can split the pattens for the load and store for these data types? Regards, Shafi