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From: Mohamed Shafi <shafitvm@gmail.com>
Date: Thu, 12 Nov 2009 13:40:00 -0000
Message-ID: <ba0bd44d0911120540q426e094bldbdb8fa4af254cee@mail.gmail.com>
Subject: Re: How to split mulsi3 pattern
To: Richard Henderson <rth@redhat.com>
Cc: GCC <gcc@gcc.gnu.org>
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2009/11/10 Richard Henderson <rth@redhat.com>:
> On 11/10/2009 05:48 AM, Mohamed Shafi wrote:
>>
>> (define_insn "mulsi3"
>> =A0[(set (match_operand:SI 0 "register_operand" =A0 =A0 =A0 =A0 =A0 "=3D=
&d")
>> =A0 =A0 =A0 (mult:SI (match_operand:SI 1 "register_operand" =A0"%d")
>> =A0 =A0 =A0 =A0 =A0 =A0 =A0 (match_operand:SI 2 "register_operand" "d"))=
)]
>
> Note that "%" is only useful if the constraints for the two operands are
> different (e.g. only one operand accepts an immediate input). =A0When the=
y're
> identical, you simply waste cpu cycles asking reload to try the operands =
in
> the other order.
>
>> =A0[(set (match_dup 0)
>> =A0 =A0 =A0 =A0(ashift:SI
>> =A0 =A0 =A0 =A0 (plus:SI (mult:HI (unspec:HI [(match_dup 2)] UNSPEC_REG_=
LOW)
>> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 (unspec:HI [(match_d=
up 1)] UNSPEC_REG_HIGH))
>> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0(mult:HI (unspec:HI [(match_dup 2)] U=
NSPEC_REG_HIGH)
>> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 (unspec:HI [(match_d=
up 1)] UNSPEC_REG_LOW)))
>> =A0 =A0 =A0 =A0 (const_int 16)))
>> =A0 (set (match_dup 0)
>> =A0 =A0 =A0 =A0(plus:SI (match_dup 0)
>> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 (mult:HI (unspec:HI [(match_dup 2)] UNSP=
EC_REG_LOW)
>> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0(unspec:HI [(match_du=
p 1)] UNSPEC_REG_LOW))))]
>
> Well for one, your modes don't match. =A0You actually want your unspecs a=
nd
> MULTs to be SImode.
>
> You could probably usefully model the second insn as
>
> (define_insn "mulsi3_part2"
> =A0[(set (match_operand:SI 0 "register_operand" "=3Dd")
> =A0 =A0 =A0 =A0(plus:SI
> =A0 =A0 =A0 =A0 =A0(mult:SI (zero_extend:SI
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 (match_operand:HI 1 "register_ope=
rand" "d"))
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 (zero_extend:SI
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 (match_operand:HI 2 "register_ope=
rand" "d")))
> =A0 =A0 =A0 =A0 =A0(match_operand:SI 3 "register_operand" "0")))]
> =A0""
> =A0...)

So i need to change the mode of the register from SI to HI after
reloading. Is that allowed?

Regards,
Shafi