From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 99336 invoked by alias); 15 Mar 2017 21:43:32 -0000 Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org Received: (qmail 99319 invoked by uid 89); 15 Mar 2017 21:43:31 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy=appeal X-HELO: relay1.mentorg.com Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 15 Mar 2017 21:43:29 +0000 Received: from nat-ies.mentorg.com ([192.94.31.2] helo=svr-ies-mbx-01.mgc.mentorg.com) by relay1.mentorg.com with esmtp id 1coGhZ-0003zK-Od from Andrew_Jenner@mentor.com ; Wed, 15 Mar 2017 14:43:25 -0700 Received: from [IPv6:::1] (137.202.0.87) by svr-ies-mbx-01.mgc.mentorg.com (139.181.222.1) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Wed, 15 Mar 2017 21:43:19 +0000 Subject: Re: Obsolete powerpc*-*-*spe* To: Segher Boessenkool , Olivier Hainque References: <20170214030703.GS21840@gate.crashing.org> <58A61E7B.4060903@codesourcery.com> <20170216221937.GB21840@gate.crashing.org> <58A63B91.1040102@codesourcery.com> <452E2837-FC8A-4DA2-A2B9-F58151841F58@adacore.com> <45cf27b1-2e27-460c-cb32-3be93f16b6d2@codesourcery.com> <20170315142623.GN4402@gate.crashing.org> CC: David Edelsohn , GCC Development , Sandra Loosemore , Arnaud Charlet , Joel Brobecker From: Andrew Jenner Message-ID: Date: Wed, 15 Mar 2017 21:43:00 -0000 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <20170315142623.GN4402@gate.crashing.org> Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: svr-ies-mbx-01.mgc.mentorg.com (139.181.222.1) To svr-ies-mbx-01.mgc.mentorg.com (139.181.222.1) X-IsSubscribed: yes X-SW-Source: 2017-03/txt/msg00093.txt.bz2 On 15/03/2017 14:26, Segher Boessenkool wrote: > I do not think VLE can get in, not in its current shape at least. That's unfortunate. Disregarding the SPE splitting plan for a moment, what do you think would need to be done to get it into shape? I had thought we were almost there with the patches that I sent to you and David off-list last year. > VLE > is very unlike PowerPC in many ways so it comes at a very big cost to > the port (maintenance and otherwise -- maintenance is what I care about > most). I completely understand. > Since SPE and VLE only share the part of the rs6000 port that doesn't > change at all (except for a bug fix once or twice a year), and everything > else needs special cases all over the place, it seems to me it would be > best for everyone if we split the rs6000 port in two, one for SPE and VLE > and one for the rest. Both ports could then be very significantly > simplified. > > I am assuming SPE and VLE do not support AltiVec or 64-bit PowerPC, > please correct me if that is incorrect. Also, is "normal" floating > point supported at all? My understanding is that SPE is only present in the e500v1, e500v2 and e200z[3-7] cores, all of which are 32-bit only and do not have classic floating-point units. SPE and Altivec cannot coexist as they have some overlapping instruction encodings. The successor to e500v2 (e500mc) reinstated classic floating-point and got rid of SPE. > Do you (AdaCore and Mentor) think splitting the port is a good idea? It wouldn't have been my preference, but I can understand the appeal of that plan for you. I'm surprised that the amount of shared code between SPE and PowerPC is as little as you say, but you have much more experience with the PowerPC port than I do, so I'll defer to your expertise on that matter. Are you proposing to take on the task of actually splitting it yourself? If so, that would make me a lot happier about it. >> -te200z0 >> -te200z3 >> -te200z4 > > These are VLE? Yes. > Do some of those also support PowerPC? All the e200 cores apart from e200z0 can execute 32-bit instructions as well as VLE, though we'll always generate VLE code when targetting them (otherwise they're fairly standard). Andrew