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* Is Non-Blocking cache supported in GCC?
@ 2009-09-18  2:05 Amker.Cheng
  2009-09-18  4:49 ` Ian Lance Taylor
  0 siblings, 1 reply; 4+ messages in thread
From: Amker.Cheng @ 2009-09-18  2:05 UTC (permalink / raw)
  To: gcc

Hi all:
    Recently I found two relative old papers about non-blocking cache,
etc. which are :

        1) Reducing memory latency via non-blocking and prefetching
caches.  BY Tien-Fu Chen and Jean-Loup Baer.
        2) Data Prefetching:A Cost/Performance Analysis   BY Chris Metcalf

It seems the hardware facility does have the potential to improve the
performance with
compiler's assistance(especially instruction scheduling). while on the
other hand, lifting ahead
load instructions may resulting in increasing register pressure.

So I'm thinking :
1, Has anyone from gcc folks done any investigation on this topic yet,
or any statistic data based on gcc available?
2, Does GCC(in any release version) supports it in any targets(such as
mips 24ke) with this hardware feature?
    If not currently, does it possible to support it by using target
definition macros and functions?

Any tips will be highly appreciated, thanks.
-- 
Best Regards.

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2009-09-19  4:31 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2009-09-18  2:05 Is Non-Blocking cache supported in GCC? Amker.Cheng
2009-09-18  4:49 ` Ian Lance Taylor
2009-09-18 17:17   ` Janis Johnson
2009-09-19  4:31     ` Amker.Cheng

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