From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 2149 invoked by alias); 19 Jul 2011 08:49:14 -0000 Received: (qmail 2140 invoked by uid 22791); 19 Jul 2011 08:49:13 -0000 X-SWARE-Spam-Status: No, hits=-0.4 required=5.0 tests=AWL,BAYES_00,DKIM_ADSP_CUSTOM_MED,FREEMAIL_FROM,NML_ADSP_CUSTOM_MED,RCVD_NUMERIC_HELO,RP_MATCHES_RCVD,SPF_HELO_PASS,T_TO_NO_BRKTS_FREEMAIL X-Spam-Check-By: sourceware.org Received: from lo.gmane.org (HELO lo.gmane.org) (80.91.229.12) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 19 Jul 2011 08:48:59 +0000 Received: from list by lo.gmane.org with local (Exim 4.69) (envelope-from ) id 1Qj5z8-00052n-6r for gcc@gcc.gnu.org; Tue, 19 Jul 2011 10:48:58 +0200 Received: from 193.128.72.68 ([193.128.72.68]) by main.gmane.org with esmtp (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Tue, 19 Jul 2011 10:48:58 +0200 Received: from pocmatos by 193.128.72.68 with local (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Tue, 19 Jul 2011 10:48:58 +0200 To: gcc@gcc.gnu.org From: "Paulo J. Matos" Subject: Re: splitting add instructions Date: Tue, 19 Jul 2011 10:21:00 -0000 Message-ID: References: <4E246502.6070107@redhat.com> <948EFF37-272F-4ED4-AF6D-BFA05D8D6DF6@dell.com> <4E2474C7.7030706@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.17) Gecko/20110516 Thunderbird/3.1.10 In-Reply-To: X-IsSubscribed: yes Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org X-SW-Source: 2011-07/txt/msg00324.txt.bz2 On 19/07/11 09:21, Paulo J. Matos wrote: > hummm, we are still using the old mode for condition code handling. From > what you're saying we need to use the new CCmode. I was looking at the > internal documents and even though it doesn't seem required to have a > hard register to keep the condition codes, it is also hard to know how > it is actually implemented. Is there any port which doesn't have a hard > register representing a condition code, which used CCMode? > I have been looking at the rx port. Seems to be very similar to mine in that it has an add and adc where both set the flags and no explicit hard register for cc. Mine is actually simpler in that there is only CCmode since we don't have floating point operations in the chip. Will use rx as a guide! :) -- PMatos