From: Geoff Keating <geoffk@geoffk.org>
To: Rayson Ho <raysonlogin@yahoo.com>
Cc: gcc@gcc.gnu.org
Subject: Re: instruction sync -- need to preserve order
Date: Thu, 06 Dec 2001 15:04:00 -0000 [thread overview]
Message-ID: <jm4rn4ymwo.fsf@geoffk.org> (raw)
In-Reply-To: Rayson Ho's message of "Thu, 6 Dec 2001 13:29:47 -0800 (PST)"
Rayson Ho <raysonlogin@yahoo.com> writes:
> Hi,
>
> How can I make sure that gcc does not schedule instructions across a
> memory barrier?? I am porting a threads library from AIX to PPC Linux,
> and on AIX, the compiler has a build-in instruction that allows me to
> do that.
What you really want to do is specify to GCC that the memory barrier
affects memory, like this (assuming the barrier you're using is the
"sync" instruction):
asm ("sync" : : : "memory");
Instructions that don't affect memory will still be scheduled across
it, but memory will be consistent.
--
- Geoffrey Keating <geoffk@geoffk.org> <geoffk@redhat.com>
prev parent reply other threads:[~2001-12-06 23:01 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-12-06 14:05 Rayson Ho
2001-12-06 15:04 ` Geoff Keating [this message]
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