Re: Vector modes under hppa64-hpu

[Aldy Hernandez <aldyh@redhat.com>]

>>>>> "Joern" == Joern Rennecke <joern.rennecke@superh.com> writes:

 >   	  else
 >   	    t = simplify_gen_subreg (submode, target, mode, i * subsize);
 > ! 	  if (CONSTANT_P (op0) || GET_CODE (op0) == REG)
 >   	    a = simplify_gen_subreg (submode, op0, mode, i * subsize);
 >   	  else
 >   	    a = extract_bit_field (op0, subbitsize, i * subbitsize, unsignedp,
 >   				   NULL_RTX, submode, submode, size);
 > ! 	  if (CONSTANT_P (op1) || GET_CODE (op1) == REG)
 >   	    b = simplify_gen_subreg (submode, op1, mode, i * subsize);
 >   	  else
 >   	    b = extract_bit_field (op1, subbitsize, i * subbitsize, unsignedp,


 > That doesn't work when submode is smaller than a word.  At register allocation
 > time, every subreg of a single hard register is assumed to be a low part,
 > even if its not.

Joern.  Could we keep the above code and add a check for the submode
being >= word?  It seems like the extract_bit_field is a bit of
overkill when the submode is just the word size.

What do you think?

Aldy