From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 13983 invoked by alias); 15 Jun 2009 17:57:39 -0000 Received: (qmail 13919 invoked by uid 22791); 15 Jun 2009 17:57:38 -0000 X-SWARE-Spam-Status: No, hits=-2.0 required=5.0 tests=AWL,BAYES_00,J_CHICKENPOX_22,J_CHICKENPOX_32,SPF_PASS X-Spam-Check-By: sourceware.org Received: from smtp-out.google.com (HELO smtp-out.google.com) (216.239.45.13) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 15 Jun 2009 17:57:32 +0000 Received: from wpaz9.hot.corp.google.com (wpaz9.hot.corp.google.com [172.24.198.73]) by smtp-out.google.com with ESMTP id n5FHvTrg014547 for ; Mon, 15 Jun 2009 10:57:30 -0700 Received: from wf-out-1314.google.com (wfc25.prod.google.com [10.142.3.25]) by wpaz9.hot.corp.google.com with ESMTP id n5FHvR28020129 for ; Mon, 15 Jun 2009 10:57:27 -0700 Received: by wf-out-1314.google.com with SMTP id 25so1323059wfc.14 for ; Mon, 15 Jun 2009 10:57:26 -0700 (PDT) Received: by 10.142.50.6 with SMTP id x6mr3209014wfx.261.1245088646851; Mon, 15 Jun 2009 10:57:26 -0700 (PDT) Received: from localhost.localdomain.google.com (adsl-71-133-8-30.dsl.pltn13.pacbell.net [71.133.8.30]) by mx.google.com with ESMTPS id 24sm1212757wff.31.2009.06.15.10.57.26 (version=TLSv1/SSLv3 cipher=RC4-MD5); Mon, 15 Jun 2009 10:57:26 -0700 (PDT) To: daniel tian Cc: gcc@gcc.gnu.org Subject: Re: Address mode offset spill References: <121fadb80906140733g6b1eec5eg4ea945867f4affb7@mail.gmail.com> From: Ian Lance Taylor Date: Mon, 15 Jun 2009 17:57:00 -0000 In-Reply-To: <121fadb80906140733g6b1eec5eg4ea945867f4affb7@mail.gmail.com> (daniel tian's message of "Sun\, 14 Jun 2009 22\:33\:18 +0800") Message-ID: User-Agent: Gnus/5.11 (Gnus v5.11) Emacs/22.3 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-System-Of-Record: true X-IsSubscribed: yes Mailing-List: contact gcc-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-owner@gcc.gnu.org X-SW-Source: 2009-06/txt/msg00320.txt.bz2 daniel tian writes: > There is a problem I encountered. I port gcc to 32bit RISC. The > LOAD/STORE only has 8bit displacement. If the immediate displacement > larger than 256, the displacement must be force into register. In > addition, if the immediate is larger than 512, it can only move into > one specified register R0. > > Like: > > LW R2 (R1) #252 ;; means R2 = Mem(R1 + 255) > > LW R2 (R1) #508;; it is wrong. immediate 508 should force into > register first. > > > LW R2 (R1) #0x500;; it is wrong, immediate 0x500 should force into > register R0 first. > > Now, for immediate movement, it is achieved to move large immediate. > But I don't know how to make the address mode legitimate. Now I try to > add the code in LEGITIMIZE_RELOAD_ADDRESS like sh.md, or arm.md. But > cc1 still crashed, when the frame size is larger than 255. Do I miss > something? I would fix this in LEGITIMIZE_RELOAD_ADDRESS or in TARGET_SECONDARY_RELOAD. I don't know why cc1 crashed, you will have to debug that. Ian