How to implement the instruction in the back end

How to implement the instruction in the back end

[Mohamed Shafi]

Hello all,

For the 16-bit target that i porting now to gcc 4.1.2 doesn't have any
branch instructions. It only has jump instructions. For comparison
operation it has this instruction:

if cond Rx Ry
 execute this insn

So compare and branch is implemented as

if cond Rx Ry
  jmp Label

This instructions has also another form. To check whether a particular
bit in a register is set or not.

if bs Rx, bitNo
 execute this insn

My questions is how will i be able to implement this instruction in
the back-end?
Will i be able to do this using builtins?
Or inline assembly is my only choice.

Any help is appreciated.
Thanks for your time.

Regards,
Shafi

Re: How to implement the instruction in the back end

[Ian Lance Taylor]

"Mohamed Shafi" <shafitvm@gmail.com> writes:

> For the 16-bit target that i porting now to gcc 4.1.2 doesn't have any
> branch instructions. It only has jump instructions. For comparison
> operation it has this instruction:
>
> if cond Rx Ry
>  execute this insn
>
> So compare and branch is implemented as
>
> if cond Rx Ry
>   jmp Label

For gcc's purposes this is no different from having a usual
conditional branch instruction.  It's just a jump with a condition.

> This instructions has also another form. To check whether a particular
> bit in a register is set or not.
>
> if bs Rx, bitNo
>  execute this insn
>
> My questions is how will i be able to implement this instruction in
> the back-end?

Sure, this is just a conditional instruction where the condition is a
ZERO_EXTRACT.

Look at the ARM backend for examples of how to work with conditional
instructions.

Ian

Re: How to implement the instruction in the back end

[Mohamed Shafi]

On Fri, May 9, 2008 at 12:03 AM, Ian Lance Taylor <iant@google.com> wrote:
> "Mohamed Shafi" <shafitvm@gmail.com> writes:
>
>  > For the 16-bit target that i porting now to gcc 4.1.2 doesn't have any
>  > branch instructions. It only has jump instructions. For comparison
>  > operation it has this instruction:
>  >
>  > if cond Rx Ry
>  >  execute this insn
>  >
>  > So compare and branch is implemented as
>  >
>  > if cond Rx Ry
>  >   jmp Label
>
>  For gcc's purposes this is no different from having a usual
>  conditional branch instruction.  It's just a jump with a condition.
>
>
>  > This instructions has also another form. To check whether a particular
>  > bit in a register is set or not.
>  >
>  > if bs Rx, bitNo
>  >  execute this insn
>  >
>  > My questions is how will i be able to implement this instruction in
>  > the back-end?
>
>  Sure, this is just a conditional instruction where the condition is a
>  ZERO_EXTRACT.
>
>  Look at the ARM backend for examples of how to work with conditional
>  instructions.

thanks for the pointer. In fact many back-ends have this, now that you
have showed me where to look
But it would of great help if you could tell the C statment that
actually invoked this type of pattern .. Maybe wrt some back-end?

Regards,
Shafi

Re: How to implement the instruction in the back end

[Ian Lance Taylor]

"Mohamed Shafi" <shafitvm@gmail.com> writes:

> But it would of great help if you could tell the C statment that
> actually invoked this type of pattern .. Maybe wrt some back-end?

This type of pattern is only generated by if-conversion.  Look at
cond_exec_process_insns in ifcvt.c.

Ian