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* Re: [i386] pni => sse3 -- GCC 3.3.3 related
  2004-02-03 22:25 [i386] pni => sse3 -- GCC 3.3.3 related Kelley Cook
@ 2004-02-03 22:00 ` Kelley Cook
  2004-02-04 15:08   ` Gabriel Dos Reis
  0 siblings, 1 reply; 16+ messages in thread
From: Kelley Cook @ 2004-02-03 22:00 UTC (permalink / raw)
  To: gcc-patches, GCC Mailing List; +Cc: Gabriel Dos Reis, H. J. Lu

[-- Attachment #1: Type: text/plain, Size: 64 bytes --]

[effectiveness of rant gets lost without patch attached]

OK?



[-- Attachment #2: sse3.patch --]
[-- Type: text/plain, Size: 13963 bytes --]

2004-02-03  Kelley Cook  <kcook@gcc.gnu.org>

	* config/i386/i386.c: Rename pni to sse3.
	* config/i386/i386.h: Likewise.
        * config/i386/i386.md: Likewise.
	* config/i386/pmmintrin.h
	* doc/extend.texi: Likewise.
	* doc/invoke.texi: Likewise.

diff -prud gcc-orig/gcc/config/i386/i386.c gcc-snapshot/gcc/config/i386/i386.c
--- gcc-orig/gcc/config/i386/i386.c	2004-01-27 05:30:07.000000000 -0500
+++ gcc-snapshot/gcc/config/i386/i386.c	2004-02-03 14:57:14.654236800 -0500
@@ -1372,8 +1372,8 @@ override_options (void)
   if (x86_arch_always_fancy_math_387 & (1 << ix86_arch))
     target_flags &= ~MASK_NO_FANCY_MATH_387;
 
-  /* Turn on SSE2 builtins for -mpni.  */
-  if (TARGET_PNI)
+  /* Turn on SSE2 builtins for -msse3.  */
+  if (TARGET_SSE3)
     target_flags |= MASK_SSE2;
 
   /* Turn on SSE builtins for -msse2.  */
@@ -12996,13 +12996,13 @@ static const struct builtin_description 
   { MASK_SSE2, CODE_FOR_cvtsd2ss, 0, IX86_BUILTIN_CVTSD2SS, 0, 0 },
   { MASK_SSE2, CODE_FOR_cvtss2sd, 0, IX86_BUILTIN_CVTSS2SD, 0, 0 },
 
-  /* PNI MMX */
-  { MASK_PNI, CODE_FOR_addsubv4sf3, "__builtin_ia32_addsubps", IX86_BUILTIN_ADDSUBPS, 0, 0 },
-  { MASK_PNI, CODE_FOR_addsubv2df3, "__builtin_ia32_addsubpd", IX86_BUILTIN_ADDSUBPD, 0, 0 },
-  { MASK_PNI, CODE_FOR_haddv4sf3, "__builtin_ia32_haddps", IX86_BUILTIN_HADDPS, 0, 0 },
-  { MASK_PNI, CODE_FOR_haddv2df3, "__builtin_ia32_haddpd", IX86_BUILTIN_HADDPD, 0, 0 },
-  { MASK_PNI, CODE_FOR_hsubv4sf3, "__builtin_ia32_hsubps", IX86_BUILTIN_HSUBPS, 0, 0 },
-  { MASK_PNI, CODE_FOR_hsubv2df3, "__builtin_ia32_hsubpd", IX86_BUILTIN_HSUBPD, 0, 0 }
+  /* SSE3 MMX */
+  { MASK_SSE3, CODE_FOR_addsubv4sf3, "__builtin_ia32_addsubps", IX86_BUILTIN_ADDSUBPS, 0, 0 },
+  { MASK_SSE3, CODE_FOR_addsubv2df3, "__builtin_ia32_addsubpd", IX86_BUILTIN_ADDSUBPD, 0, 0 },
+  { MASK_SSE3, CODE_FOR_haddv4sf3, "__builtin_ia32_haddps", IX86_BUILTIN_HADDPS, 0, 0 },
+  { MASK_SSE3, CODE_FOR_haddv2df3, "__builtin_ia32_haddpd", IX86_BUILTIN_HADDPD, 0, 0 },
+  { MASK_SSE3, CODE_FOR_hsubv4sf3, "__builtin_ia32_hsubps", IX86_BUILTIN_HSUBPS, 0, 0 },
+  { MASK_SSE3, CODE_FOR_hsubv2df3, "__builtin_ia32_hsubpd", IX86_BUILTIN_HSUBPD, 0, 0 }
 };
 
 static const struct builtin_description bdesc_1arg[] =
@@ -13050,10 +13050,10 @@ static const struct builtin_description 
 
   { MASK_SSE2, CODE_FOR_sse2_movq, 0, IX86_BUILTIN_MOVQ, 0, 0 },
 
-  /* PNI */
-  { MASK_PNI, CODE_FOR_movshdup, 0, IX86_BUILTIN_MOVSHDUP, 0, 0 },
-  { MASK_PNI, CODE_FOR_movsldup, 0, IX86_BUILTIN_MOVSLDUP, 0, 0 },
-  { MASK_PNI, CODE_FOR_movddup,  0, IX86_BUILTIN_MOVDDUP, 0, 0 }
+  /* SSE3 */
+  { MASK_SSE3, CODE_FOR_movshdup, 0, IX86_BUILTIN_MOVSHDUP, 0, 0 },
+  { MASK_SSE3, CODE_FOR_movsldup, 0, IX86_BUILTIN_MOVSLDUP, 0, 0 },
+  { MASK_SSE3, CODE_FOR_movddup,  0, IX86_BUILTIN_MOVDDUP, 0, 0 }
 };
 
 void
@@ -13679,23 +13679,23 @@ ix86_init_mmx_sse_builtins (void)
   def_builtin (MASK_SSE2, "__builtin_ia32_pmaddwd128", v4si_ftype_v8hi_v8hi, IX86_BUILTIN_PMADDWD128);
 
   /* Prescott New Instructions.  */
-  def_builtin (MASK_PNI, "__builtin_ia32_monitor",
+  def_builtin (MASK_SSE3, "__builtin_ia32_monitor",
 	       void_ftype_pcvoid_unsigned_unsigned,
 	       IX86_BUILTIN_MONITOR);
-  def_builtin (MASK_PNI, "__builtin_ia32_mwait",
+  def_builtin (MASK_SSE3, "__builtin_ia32_mwait",
 	       void_ftype_unsigned_unsigned,
 	       IX86_BUILTIN_MWAIT);
-  def_builtin (MASK_PNI, "__builtin_ia32_movshdup",
+  def_builtin (MASK_SSE3, "__builtin_ia32_movshdup",
 	       v4sf_ftype_v4sf,
 	       IX86_BUILTIN_MOVSHDUP);
-  def_builtin (MASK_PNI, "__builtin_ia32_movsldup",
+  def_builtin (MASK_SSE3, "__builtin_ia32_movsldup",
 	       v4sf_ftype_v4sf,
 	       IX86_BUILTIN_MOVSLDUP);
-  def_builtin (MASK_PNI, "__builtin_ia32_lddqu",
+  def_builtin (MASK_SSE3, "__builtin_ia32_lddqu",
 	       v16qi_ftype_pcchar, IX86_BUILTIN_LDDQU);
-  def_builtin (MASK_PNI, "__builtin_ia32_loadddup",
+  def_builtin (MASK_SSE3, "__builtin_ia32_loadddup",
 	       v2df_ftype_pcdouble, IX86_BUILTIN_LOADDDUP);
-  def_builtin (MASK_PNI, "__builtin_ia32_movddup",
+  def_builtin (MASK_SSE3, "__builtin_ia32_movddup",
 	       v2df_ftype_v2df, IX86_BUILTIN_MOVDDUP);
 }
 
diff -prud gcc-orig/gcc/config/i386/i386.h gcc-snapshot/gcc/config/i386/i386.h
--- gcc-orig/gcc/config/i386/i386.h	2004-01-14 18:07:04.000000000 -0500
+++ gcc-snapshot/gcc/config/i386/i386.h	2004-02-03 14:57:14.844510400 -0500
@@ -121,7 +121,7 @@ extern int target_flags;
 #define MASK_MMX		0x00002000	/* Support MMX regs/builtins */
 #define MASK_SSE		0x00004000	/* Support SSE regs/builtins */
 #define MASK_SSE2		0x00008000	/* Support SSE2 regs/builtins */
-#define MASK_PNI		0x00010000	/* Support PNI regs/builtins */
+#define MASK_SSE3		0x00010000	/* Support SSE3 regs/builtins */
 #define MASK_3DNOW		0x00020000	/* Support 3Dnow builtins */
 #define MASK_3DNOW_A		0x00040000	/* Support Athlon 3Dnow builtins */
 #define MASK_128BIT_LONG_DOUBLE 0x00080000	/* long double size is 128bit */
@@ -303,7 +303,7 @@ extern int x86_prefetch_sse;
 
 #define TARGET_SSE ((target_flags & MASK_SSE) != 0)
 #define TARGET_SSE2 ((target_flags & MASK_SSE2) != 0)
-#define TARGET_PNI ((target_flags & MASK_PNI) != 0)
+#define TARGET_SSE3 ((target_flags & MASK_SSE3) != 0)
 #define TARGET_SSE_MATH ((ix86_fpmath & FPMATH_SSE) != 0)
 #define TARGET_MIX_SSE_I387 ((ix86_fpmath & FPMATH_SSE) \
 			     && (ix86_fpmath & FPMATH_387))
@@ -399,10 +399,10 @@ extern int x86_prefetch_sse;
     N_("Support MMX, SSE and SSE2 built-in functions and code generation") }, \
   { "no-sse2",			 -MASK_SSE2,				      \
     N_("Do not support MMX, SSE and SSE2 built-in functions and code generation") },    \
-  { "pni",			 MASK_PNI,				      \
-    N_("Support MMX, SSE, SSE2 and PNI built-in functions and code generation") },\
-  { "no-pni",			 -MASK_PNI,				      \
-    N_("Do not support MMX, SSE, SSE2 and PNI built-in functions and code generation") },\
+  { "sse3",			 MASK_SSE3,				      \
+    N_("Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation") },\
+  { "no-sse3",			 -MASK_SSE3,				      \
+    N_("Do not support MMX, SSE, SSE2 and SSE3 built-in functions and code generation") },\
   { "128bit-long-double",	 MASK_128BIT_LONG_DOUBLE,		      \
     N_("sizeof(long double) is 16") },					      \
   { "96bit-long-double",	-MASK_128BIT_LONG_DOUBLE,		      \
@@ -616,8 +616,8 @@ extern int x86_prefetch_sse;
 	builtin_define ("__SSE__");				\
       if (TARGET_SSE2)						\
 	builtin_define ("__SSE2__");				\
-      if (TARGET_PNI)						\
-	builtin_define ("__PNI__");				\
+      if (TARGET_SSE3)						\
+	builtin_define ("__SSE3__");				\
       if (TARGET_SSE_MATH && TARGET_SSE)			\
 	builtin_define ("__SSE_MATH__");			\
       if (TARGET_SSE_MATH && TARGET_SSE2)			\
diff -prud gcc-orig/gcc/config/i386/i386.md gcc-snapshot/gcc/config/i386/i386.md
--- gcc-orig/gcc/config/i386/i386.md	2004-01-16 13:53:45.000000000 -0500
+++ gcc-snapshot/gcc/config/i386/i386.md	2004-02-03 14:57:15.615619200 -0500
@@ -22993,13 +22993,13 @@
   [(set_attr "type" "sse")
    (set_attr "memory" "unknown")])
 
-;; PNI
+;; SSE3
 
 (define_insn "mwait"
   [(unspec_volatile [(match_operand:SI 0 "register_operand" "a")
 		     (match_operand:SI 1 "register_operand" "c")]
 		    UNSPECV_MWAIT)]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "mwait\t%0, %1"
   [(set_attr "length" "3")])
 
@@ -23008,18 +23008,18 @@
 		     (match_operand:SI 1 "register_operand" "c")
 		     (match_operand:SI 2 "register_operand" "d")]
 		    UNSPECV_MONITOR)]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "monitor\t%0, %1, %2"
   [(set_attr "length" "3")])
 
-;; PNI arithmetic
+;; SSE3 arithmetic
 
 (define_insn "addsubv4sf3"
   [(set (match_operand:V4SF 0 "register_operand" "=x")
         (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "0")
 		      (match_operand:V4SF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_ADDSUB))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "addsubps\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V4SF")])
@@ -23029,7 +23029,7 @@
         (unspec:V2DF [(match_operand:V2DF 1 "register_operand" "0")
 		      (match_operand:V2DF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_ADDSUB))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "addsubpd\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V2DF")])
@@ -23039,7 +23039,7 @@
         (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "0")
 		      (match_operand:V4SF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_HADD))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "haddps\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V4SF")])
@@ -23049,7 +23049,7 @@
         (unspec:V2DF [(match_operand:V2DF 1 "register_operand" "0")
 		      (match_operand:V2DF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_HADD))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "haddpd\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V2DF")])
@@ -23059,7 +23059,7 @@
         (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "0")
 		      (match_operand:V4SF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_HSUB))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "hsubps\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V4SF")])
@@ -23069,7 +23069,7 @@
         (unspec:V2DF [(match_operand:V2DF 1 "register_operand" "0")
 		      (match_operand:V2DF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_HSUB))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "hsubpd\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V2DF")])
@@ -23078,7 +23078,7 @@
   [(set (match_operand:V4SF 0 "register_operand" "=x")
         (unspec:V4SF
 	 [(match_operand:V4SF 1 "nonimmediate_operand" "xm")] UNSPEC_MOVSHDUP))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "movshdup\t{%1, %0|%0, %1}"
   [(set_attr "type" "sse")
    (set_attr "mode" "V4SF")])
@@ -23087,7 +23087,7 @@
   [(set (match_operand:V4SF 0 "register_operand" "=x")
         (unspec:V4SF
 	 [(match_operand:V4SF 1 "nonimmediate_operand" "xm")] UNSPEC_MOVSLDUP))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "movsldup\t{%1, %0|%0, %1}"
   [(set_attr "type" "sse")
    (set_attr "mode" "V4SF")])
@@ -23096,7 +23096,7 @@
   [(set (match_operand:V16QI 0 "register_operand" "=x")
 	(unspec:V16QI [(match_operand:V16QI 1 "memory_operand" "m")]
 		       UNSPEC_LDQQU))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "lddqu\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecvt")
    (set_attr "mode" "TI")])
@@ -23104,7 +23104,7 @@
 (define_insn "loadddup"
   [(set (match_operand:V2DF 0 "register_operand" "=x")
 	(vec_duplicate:V2DF (match_operand:DF 1 "memory_operand" "m")))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "movddup\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecvt")
    (set_attr "mode" "DF")])
@@ -23114,7 +23114,7 @@
 	(vec_duplicate:V2DF
 	 (vec_select:DF (match_operand:V2DF 1 "register_operand" "x")
 			(parallel [(const_int 0)]))))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "movddup\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecvt")
    (set_attr "mode" "DF")])
diff -prud gcc-orig/gcc/config/i386/pmmintrin.h gcc-snapshot/gcc/config/i386/pmmintrin.h
--- gcc-orig/gcc/config/i386/pmmintrin.h	2003-09-26 00:07:46.000000000 -0400
+++ gcc-snapshot/gcc/config/i386/pmmintrin.h	2004-02-03 14:57:16.026209600 -0500
@@ -30,7 +30,7 @@
 #ifndef _PMMINTRIN_H_INCLUDED
 #define _PMMINTRIN_H_INCLUDED
 
-#ifdef __PNI__
+#ifdef __SSE3__
 #include <xmmintrin.h>
 #include <emmintrin.h>
 
@@ -127,6 +127,6 @@ _mm_mwait (unsigned int __E, unsigned in
 #define _mm_mwait(E, H)		__builtin_ia32_mwait ((E), (H))
 #endif
 
-#endif /* __PNI__ */
+#endif /* __SSE3__ */
 
 #endif /* _PMMINTRIN_H_INCLUDED */
diff -prud gcc-orig/gcc/doc/extend.texi gcc-snapshot/gcc/doc/extend.texi
--- gcc-orig/gcc/doc/extend.texi	2004-01-21 12:27:17.000000000 -0500
+++ gcc-snapshot/gcc/doc/extend.texi	2004-02-03 14:58:55.549316800 -0500
@@ -6065,7 +6065,7 @@ Generates the @code{movhps} machine inst
 Generates the @code{movlps} machine instruction as a store to memory.
 @end table
 
-The following built-in functions are available when @option{-mpni} is used.
+The following built-in functions are available when @option{-msse3} is used.
 All of them generate the machine instruction that is part of the name.
 
 @smallexample
@@ -6083,7 +6083,7 @@ v4sf __builtin_ia32_movsldup (v4sf)
 void __builtin_ia32_mwait (unsigned int, unsigned int)
 @end smallexample
 
-The following built-in functions are available when @option{-mpni} is used.
+The following built-in functions are available when @option{-msse3} is used.
 
 @table @code
 @item v2df __builtin_ia32_loadddup (double const *)
diff -prud gcc-orig/gcc/doc/invoke.texi gcc-snapshot/gcc/doc/invoke.texi
--- gcc-orig/gcc/doc/invoke.texi	2004-01-27 19:16:00.000000000 -0500
+++ gcc-snapshot/gcc/doc/invoke.texi	2004-02-03 15:01:42.228990400 -0500
@@ -488,7 +488,7 @@ in the following sections.
 -mno-fp-ret-in-387  -msoft-float  -msvr3-shlib @gol
 -mno-wide-multiply  -mrtd  -malign-double @gol
 -mpreferred-stack-boundary=@var{num} @gol
--mmmx  -msse  -msse2 -mpni -m3dnow @gol
+-mmmx  -msse  -msse2 -msse3 -m3dnow @gol
 -mthreads  -mno-align-stringops  -minline-all-stringops @gol
 -mpush-args  -maccumulate-outgoing-args  -m128bit-long-double @gol
 -m96bit-long-double  -mregparm=@var{num}  -momit-leaf-frame-pointer @gol
@@ -8212,9 +8212,9 @@ code that expects temporaries to be 80bi
 
 This is the default choice for x86-64 compiler.
 
-@item pni
+@item sse3
 Use all SSE extensions enabled by @option{-msse2} as well as the new
-SSE extensions in Prescott New Instructions. @option{-mpni} also
+SSE extensions in Prescott New Instructions. @option{-msse3} also
 enables 2 builtin functions, @code{__builtin_ia32_monitor} and
 @code{__builtin_ia32_mwait}, for new instructions @code{monitor} and
 @code{mwait}.
@@ -8400,8 +8400,8 @@ preferred alignment to @option{-mpreferr
 @itemx -mno-sse
 @item -msse2
 @itemx -mno-sse2
-@item -mpni
-@itemx -mno-pni
+@item -msse3
+@itemx -mno-sse3
 @item -m3dnow
 @itemx -mno-3dnow
 @opindex mmmx

^ permalink raw reply	[flat|nested] 16+ messages in thread
* [i386] pni => sse3 -- GCC 3.3.3 related
@ 2004-02-03 22:25 Kelley Cook
  2004-02-03 22:00 ` Kelley Cook
  0 siblings, 1 reply; 16+ messages in thread
From: Kelley Cook @ 2004-02-03 22:25 UTC (permalink / raw)
  To: gcc-patches, GCC Mailing List; +Cc: Gabriel Dos Reis, H. J. Lu

The 90nm version of the Pentium 4 (formerly code named Prescott) was 
released yesterday.  Somewhat surprisingly, the chip was not given a new 
name.

Unsurprisingly, PNI (Prescott New Instructions) were renamed to SSE3. 
This mechanical patch updates GCC accordingly.

Note that this renaming is riding on the fact that "-mpni" support has 
not yet been included in a FSF released compiler.  However, this feature 
was backported to be included in GCC 3.3.3 
(http://gcc.gnu.org/ml/gcc-cvs/2003-11/msg00096.html).  Personally I 
think it would be a mistake to include an option switch which was based 
on an internal codename in a released compiler -- especially a bug fix 
compiler.  If 3.3.3 is released as is then "-mpni" will have to be 
supported for years afterward.

This is why I believe that either this patch also needs to included with 
GCC 3.3.3 or else the recently added PNI support should be reverted from 
3.3.3.

Patch was bootstrapped on pentium4-pc-cygwin — though I do not have 
Pentium 4 E-step to test its effectiveness on.

OK?
3.4?
3.3.3?


^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [i386] pni => sse3 -- GCC 3.3.3 related
  2004-02-03 22:00 ` Kelley Cook
@ 2004-02-04 15:08   ` Gabriel Dos Reis
  2004-02-05  1:11     ` H. J. Lu
  0 siblings, 1 reply; 16+ messages in thread
From: Gabriel Dos Reis @ 2004-02-04 15:08 UTC (permalink / raw)
  To: Kelley Cook; +Cc: gcc-patches, GCC Mailing List, H. J. Lu

Kelley Cook <kcook34@ford.com> writes:

| [effectiveness of rant gets lost without patch attached]
| 
| OK?

HJ, please would mind stepping in, and  give your inputs?

-- Gaby

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [i386] pni => sse3 -- GCC 3.3.3 related
  2004-02-04 15:08   ` Gabriel Dos Reis
@ 2004-02-05  1:11     ` H. J. Lu
  2004-02-05  1:28       ` Gabriel Dos Reis
  0 siblings, 1 reply; 16+ messages in thread
From: H. J. Lu @ 2004-02-05  1:11 UTC (permalink / raw)
  To: Gabriel Dos Reis; +Cc: Kelley Cook, gcc-patches, GCC Mailing List

On Wed, Feb 04, 2004 at 04:00:38PM +0100, Gabriel Dos Reis wrote:
> Kelley Cook <kcook34@ford.com> writes:
> 
> | [effectiveness of rant gets lost without patch attached]
> | 
> | OK?
> 
> HJ, please would mind stepping in, and  give your inputs?
> 
> -- Gaby

I would prefer to remove pni from 3.4 and make it an alias for sse3 in
3.3. We should give a warning in 3.3 if pni is used.


H.J.

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [i386] pni => sse3 -- GCC 3.3.3 related
  2004-02-05  1:11     ` H. J. Lu
@ 2004-02-05  1:28       ` Gabriel Dos Reis
  2004-02-06 17:41         ` H. J. Lu
  0 siblings, 1 reply; 16+ messages in thread
From: Gabriel Dos Reis @ 2004-02-05  1:28 UTC (permalink / raw)
  To: H. J. Lu; +Cc: Kelley Cook, gcc-patches, GCC Mailing List

"H. J. Lu" <hjl@lucon.org> writes:

| On Wed, Feb 04, 2004 at 04:00:38PM +0100, Gabriel Dos Reis wrote:
| > Kelley Cook <kcook34@ford.com> writes:
| > 
| > | [effectiveness of rant gets lost without patch attached]
| > | 
| > | OK?
| > 
| > HJ, please would mind stepping in, and  give your inputs?
| > 
| > -- Gaby
| 
| I would prefer to remove pni from 3.4 and make it an alias for sse3 in
| 3.3. We should give a warning in 3.3 if pni is used.

Ahem.

Considering that you made the backport to gcc-3_3-branh, would you
mind making the above changes you prefer?  I'm planning to make a
second iteration of the prereease tonight, I would appreciate if you
could submit something as soon as possible.  Otherwise, the changes
would not go into the release (which is soon).

-- Gaby

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [i386] pni => sse3 -- GCC 3.3.3 related
  2004-02-05  1:28       ` Gabriel Dos Reis
@ 2004-02-06 17:41         ` H. J. Lu
  2004-02-06 19:09           ` Gabriel Dos Reis
  2004-02-21  1:36           ` Jim Wilson
  0 siblings, 2 replies; 16+ messages in thread
From: H. J. Lu @ 2004-02-06 17:41 UTC (permalink / raw)
  To: Gabriel Dos Reis; +Cc: Kelley Cook, gcc-patches, GCC Mailing List

[-- Attachment #1: Type: text/plain, Size: 914 bytes --]

On Thu, Feb 05, 2004 at 02:21:11AM +0100, Gabriel Dos Reis wrote:
> "H. J. Lu" <hjl@lucon.org> writes:
> 
> | On Wed, Feb 04, 2004 at 04:00:38PM +0100, Gabriel Dos Reis wrote:
> | > Kelley Cook <kcook34@ford.com> writes:
> | > 
> | > | [effectiveness of rant gets lost without patch attached]
> | > | 
> | > | OK?
> | > 
> | > HJ, please would mind stepping in, and  give your inputs?
> | > 
> | > -- Gaby
> | 
> | I would prefer to remove pni from 3.4 and make it an alias for sse3 in
> | 3.3. We should give a warning in 3.3 if pni is used.
> 
> Ahem.
> 
> Considering that you made the backport to gcc-3_3-branh, would you
> mind making the above changes you prefer?  I'm planning to make a
> second iteration of the prereease tonight, I would appreciate if you
> could submit something as soon as possible.  Otherwise, the changes
> would not go into the release (which is soon).
> 

Here is the patch.


H.J.

[-- Attachment #2: sse3-2.patch --]
[-- Type: text/plain, Size: 14529 bytes --]

2004-02-06  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/invoke.texi: Mention SSE2 and SSE3.

	* config/i386/i386.h: Deprecate -mpni/-mno-pni.

2004-02-03  Kelley Cook  <kcook@gcc.gnu.org>

	* config/i386/i386.c: Rename pni to sse3.
	* config/i386/i386.h: Likewise.
        * config/i386/i386.md: Likewise.
	* config/i386/pmmintrin.h: Likewise.
	* doc/extend.texi: Likewise.
	* doc/invoke.texi: Likewise.

--- gcc/config/i386/i386.c.sse3	2004-01-27 11:17:34.000000000 -0800
+++ gcc/config/i386/i386.c	2004-02-06 09:09:44.000000000 -0800
@@ -1257,8 +1257,8 @@ override_options ()
   if (x86_arch_always_fancy_math_387 & (1 << ix86_arch))
     target_flags &= ~MASK_NO_FANCY_MATH_387;
 
-  /* Turn on SSE2 builtins for -mpni.  */
-  if (TARGET_PNI)
+  /* Turn on SSE2 builtins for -msse3.  */
+  if (TARGET_SSE3)
     target_flags |= MASK_SSE2;
 
   /* Turn on SSE builtins for -msse2.  */
@@ -12397,13 +12397,13 @@ static const struct builtin_description 
   { MASK_SSE2, CODE_FOR_cvtsd2ss, 0, IX86_BUILTIN_CVTSD2SS, 0, 0 },
   { MASK_SSE2, CODE_FOR_cvtss2sd, 0, IX86_BUILTIN_CVTSS2SD, 0, 0 },
 
-  /* PNI MMX */
-  { MASK_PNI, CODE_FOR_addsubv4sf3, "__builtin_ia32_addsubps", IX86_BUILTIN_ADDSUBPS, 0, 0 },
-  { MASK_PNI, CODE_FOR_addsubv2df3, "__builtin_ia32_addsubpd", IX86_BUILTIN_ADDSUBPD, 0, 0 },
-  { MASK_PNI, CODE_FOR_haddv4sf3, "__builtin_ia32_haddps", IX86_BUILTIN_HADDPS, 0, 0 },
-  { MASK_PNI, CODE_FOR_haddv2df3, "__builtin_ia32_haddpd", IX86_BUILTIN_HADDPD, 0, 0 },
-  { MASK_PNI, CODE_FOR_hsubv4sf3, "__builtin_ia32_hsubps", IX86_BUILTIN_HSUBPS, 0, 0 },
-  { MASK_PNI, CODE_FOR_hsubv2df3, "__builtin_ia32_hsubpd", IX86_BUILTIN_HSUBPD, 0, 0 }
+  /* SSE3 MMX */
+  { MASK_SSE3, CODE_FOR_addsubv4sf3, "__builtin_ia32_addsubps", IX86_BUILTIN_ADDSUBPS, 0, 0 },
+  { MASK_SSE3, CODE_FOR_addsubv2df3, "__builtin_ia32_addsubpd", IX86_BUILTIN_ADDSUBPD, 0, 0 },
+  { MASK_SSE3, CODE_FOR_haddv4sf3, "__builtin_ia32_haddps", IX86_BUILTIN_HADDPS, 0, 0 },
+  { MASK_SSE3, CODE_FOR_haddv2df3, "__builtin_ia32_haddpd", IX86_BUILTIN_HADDPD, 0, 0 },
+  { MASK_SSE3, CODE_FOR_hsubv4sf3, "__builtin_ia32_hsubps", IX86_BUILTIN_HSUBPS, 0, 0 },
+  { MASK_SSE3, CODE_FOR_hsubv2df3, "__builtin_ia32_hsubpd", IX86_BUILTIN_HSUBPD, 0, 0 }
 };
 
 static const struct builtin_description bdesc_1arg[] =
@@ -12451,10 +12451,10 @@ static const struct builtin_description 
 
   { MASK_SSE2, CODE_FOR_sse2_movq, 0, IX86_BUILTIN_MOVQ, 0, 0 },
 
-  /* PNI */
-  { MASK_PNI, CODE_FOR_movshdup, 0, IX86_BUILTIN_MOVSHDUP, 0, 0 },
-  { MASK_PNI, CODE_FOR_movsldup, 0, IX86_BUILTIN_MOVSLDUP, 0, 0 },
-  { MASK_PNI, CODE_FOR_movddup,  0, IX86_BUILTIN_MOVDDUP, 0, 0 }
+  /* SSE3 */
+  { MASK_SSE3, CODE_FOR_movshdup, 0, IX86_BUILTIN_MOVSHDUP, 0, 0 },
+  { MASK_SSE3, CODE_FOR_movsldup, 0, IX86_BUILTIN_MOVSLDUP, 0, 0 },
+  { MASK_SSE3, CODE_FOR_movddup,  0, IX86_BUILTIN_MOVDDUP, 0, 0 }
 };
 
 void
@@ -13059,23 +13059,23 @@ ix86_init_mmx_sse_builtins ()
   def_builtin (MASK_SSE2, "__builtin_ia32_pmaddwd128", v4si_ftype_v8hi_v8hi, IX86_BUILTIN_PMADDWD128);
 
   /* Prescott New Instructions.  */
-  def_builtin (MASK_PNI, "__builtin_ia32_monitor",
+  def_builtin (MASK_SSE3, "__builtin_ia32_monitor",
 	       void_ftype_pcvoid_unsigned_unsigned,
 	       IX86_BUILTIN_MONITOR);
-  def_builtin (MASK_PNI, "__builtin_ia32_mwait",
+  def_builtin (MASK_SSE3, "__builtin_ia32_mwait",
 	       void_ftype_unsigned_unsigned,
 	       IX86_BUILTIN_MWAIT);
-  def_builtin (MASK_PNI, "__builtin_ia32_movshdup",
+  def_builtin (MASK_SSE3, "__builtin_ia32_movshdup",
 	       v4sf_ftype_v4sf,
 	       IX86_BUILTIN_MOVSHDUP);
-  def_builtin (MASK_PNI, "__builtin_ia32_movsldup",
+  def_builtin (MASK_SSE3, "__builtin_ia32_movsldup",
 	       v4sf_ftype_v4sf,
 	       IX86_BUILTIN_MOVSLDUP);
-  def_builtin (MASK_PNI, "__builtin_ia32_lddqu",
+  def_builtin (MASK_SSE3, "__builtin_ia32_lddqu",
 	       v16qi_ftype_pcchar, IX86_BUILTIN_LDDQU);
-  def_builtin (MASK_PNI, "__builtin_ia32_loadddup",
+  def_builtin (MASK_SSE3, "__builtin_ia32_loadddup",
 	       v2df_ftype_pcdouble, IX86_BUILTIN_LOADDDUP);
-  def_builtin (MASK_PNI, "__builtin_ia32_movddup",
+  def_builtin (MASK_SSE3, "__builtin_ia32_movddup",
 	       v2df_ftype_v2df, IX86_BUILTIN_MOVDDUP);
 }
 
--- gcc/config/i386/i386.h.sse3	2003-11-04 09:26:01.000000000 -0800
+++ gcc/config/i386/i386.h	2004-02-06 09:31:42.000000000 -0800
@@ -114,7 +114,7 @@ extern int target_flags;
 #define MASK_MMX		0x00002000	/* Support MMX regs/builtins */
 #define MASK_SSE		0x00004000	/* Support SSE regs/builtins */
 #define MASK_SSE2		0x00008000	/* Support SSE2 regs/builtins */
-#define MASK_PNI		0x00010000	/* Support PNI builtins */
+#define MASK_SSE3		0x00010000	/* Support SSE3 builtins */
 #define MASK_3DNOW		0x00020000	/* Support 3Dnow builtins */
 #define MASK_3DNOW_A		0x00040000	/* Support Athlon 3Dnow builtins */
 #define MASK_128BIT_LONG_DOUBLE 0x00080000	/* long double size is 128bit */
@@ -274,7 +274,7 @@ extern int x86_prefetch_sse;
 
 #define TARGET_SSE ((target_flags & MASK_SSE) != 0)
 #define TARGET_SSE2 ((target_flags & MASK_SSE2) != 0)
-#define TARGET_PNI ((target_flags & MASK_PNI) != 0)
+#define TARGET_SSE3 ((target_flags & MASK_SSE3) != 0)
 #define TARGET_SSE_MATH ((ix86_fpmath & FPMATH_SSE) != 0)
 #define TARGET_MIX_SSE_I387 ((ix86_fpmath & FPMATH_SSE) \
 			     && (ix86_fpmath & FPMATH_387))
@@ -302,6 +302,8 @@ extern int x86_prefetch_sse;
   { "486",			 0, "" /*Deprecated.*/},		      \
   { "pentium",			 0, "" /*Deprecated.*/},		      \
   { "pentiumpro",		 0, "" /*Deprecated.*/},		      \
+  { "pni",			 0, "" /*Deprecated.*/},		      \
+  { "no-pni",			 0, "" /*Deprecated.*/},		      \
   { "intel-syntax",		 0, "" /*Deprecated.*/},	 	      \
   { "no-intel-syntax",		 0, "" /*Deprecated.*/},	 	      \
   { "rtd",			 MASK_RTD,				      \
@@ -368,10 +370,10 @@ extern int x86_prefetch_sse;
     N_("Support MMX, SSE and SSE2 built-in functions and code generation") }, \
   { "no-sse2",			 -MASK_SSE2,				      \
     N_("Do not support MMX, SSE and SSE2 built-in functions and code generation") },    \
-  { "pni",			 MASK_PNI,				      \
-    N_("Support MMX, SSE, SSE2 and PNI built-in functions and code generation") }, \
-  { "no-pni",			 -MASK_PNI,				      \
-    N_("Do not support MMX, SSE, SSE2 and PNI built-in functions and code generation") }, \
+  { "sse3",			 MASK_SSE3,				      \
+    N_("Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation") }, \
+  { "no-sse3",			 -MASK_SSE3,				      \
+    N_("Do not support MMX, SSE, SSE2 and SSE3 built-in functions and code generation") }, \
   { "128bit-long-double",	 MASK_128BIT_LONG_DOUBLE,		      \
     N_("sizeof(long double) is 16") },					      \
   { "96bit-long-double",	-MASK_128BIT_LONG_DOUBLE,		      \
@@ -475,6 +477,10 @@ extern int x86_prefetch_sse;
 %n`-mpentium' is deprecated. Use `-march=pentium' or `-mcpu=pentium' instead.\n} \
 %{mpentiumpro:-mcpu=pentiumpro \
 %n`-mpentiumpro' is deprecated. Use `-march=pentiumpro' or `-mcpu=pentiumpro' instead.\n}} \
+%{mpni:-msse3 \
+%n`-mpni' is deprecated. Use `-msse3' instead.\n} \
+%{mno-pni:-mno-sse3 \
+%n`-mno-pni' is deprecated. Use `-mno-sse3' instead.\n} \
 %{mintel-syntax:-masm=intel \
 %n`-mintel-syntax' is deprecated. Use `-masm=intel' instead.\n} \
 %{mno-intel-syntax:-masm=att \
@@ -560,8 +566,11 @@ extern int x86_prefetch_sse;
 	builtin_define ("__SSE__");				\
       if (TARGET_SSE2)						\
 	builtin_define ("__SSE2__");				\
-      if (TARGET_PNI)						\
-	builtin_define ("__PNI__");				\
+      if (TARGET_SSE3)						\
+	{							\
+	  builtin_define ("__SSE3__");				\
+	  builtin_define ("__PNI__");				\
+	}							\
       if (TARGET_SSE_MATH && TARGET_SSE)			\
 	builtin_define ("__SSE_MATH__");			\
       if (TARGET_SSE_MATH && TARGET_SSE2)			\
--- gcc/config/i386/i386.md.sse3	2004-01-27 11:17:35.000000000 -0800
+++ gcc/config/i386/i386.md	2004-02-06 09:09:44.000000000 -0800
@@ -22082,13 +22082,13 @@
   [(set_attr "type" "sse")
    (set_attr "memory" "unknown")])
 
-;; PNI
+;; SSE3
 
 (define_insn "mwait"
   [(unspec_volatile [(match_operand:SI 0 "register_operand" "a")
 		     (match_operand:SI 1 "register_operand" "c")]
 		    UNSPECV_MWAIT)]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "mwait\t%0, %1"
   [(set_attr "length" "3")])
 
@@ -22097,18 +22097,18 @@
 		     (match_operand:SI 1 "register_operand" "c")
 		     (match_operand:SI 2 "register_operand" "d")]
 		    UNSPECV_MONITOR)]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "monitor\t%0, %1, %2"
   [(set_attr "length" "3")])
 
-;; PNI arithmetic
+;; SSE3 arithmetic
 
 (define_insn "addsubv4sf3"
   [(set (match_operand:V4SF 0 "register_operand" "=x")
         (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "0")
 		      (match_operand:V4SF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_ADDSUB))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "addsubps\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V4SF")])
@@ -22118,7 +22118,7 @@
         (unspec:V2DF [(match_operand:V2DF 1 "register_operand" "0")
 		      (match_operand:V2DF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_ADDSUB))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "addsubpd\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V2DF")])
@@ -22128,7 +22128,7 @@
         (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "0")
 		      (match_operand:V4SF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_HADD))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "haddps\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V4SF")])
@@ -22138,7 +22138,7 @@
         (unspec:V2DF [(match_operand:V2DF 1 "register_operand" "0")
 		      (match_operand:V2DF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_HADD))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "haddpd\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V2DF")])
@@ -22148,7 +22148,7 @@
         (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "0")
 		      (match_operand:V4SF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_HSUB))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "hsubps\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V4SF")])
@@ -22158,7 +22158,7 @@
         (unspec:V2DF [(match_operand:V2DF 1 "register_operand" "0")
 		      (match_operand:V2DF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_HSUB))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "hsubpd\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V2DF")])
@@ -22167,7 +22167,7 @@
   [(set (match_operand:V4SF 0 "register_operand" "=x")
         (unspec:V4SF
 	 [(match_operand:V4SF 1 "nonimmediate_operand" "xm")] UNSPEC_MOVSHDUP))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "movshdup\t{%1, %0|%0, %1}"
   [(set_attr "type" "sse")
    (set_attr "mode" "V4SF")])
@@ -22176,7 +22176,7 @@
   [(set (match_operand:V4SF 0 "register_operand" "=x")
         (unspec:V4SF
 	 [(match_operand:V4SF 1 "nonimmediate_operand" "xm")] UNSPEC_MOVSLDUP))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "movsldup\t{%1, %0|%0, %1}"
   [(set_attr "type" "sse")
    (set_attr "mode" "V4SF")])
@@ -22185,7 +22185,7 @@
   [(set (match_operand:V16QI 0 "register_operand" "=x")
 	(unspec:V16QI [(match_operand:V16QI 1 "memory_operand" "m")]
 		       UNSPEC_LDQQU))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "lddqu\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecvt")
    (set_attr "mode" "TI")])
@@ -22193,7 +22193,7 @@
 (define_insn "loadddup"
   [(set (match_operand:V2DF 0 "register_operand" "=x")
 	(vec_duplicate:V2DF (match_operand:DF 1 "memory_operand" "m")))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "movddup\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecvt")
    (set_attr "mode" "DF")])
@@ -22203,7 +22203,7 @@
 	(vec_duplicate:V2DF
 	 (vec_select:DF (match_operand:V2DF 1 "register_operand" "x")
 			(parallel [(const_int 0)]))))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "movddup\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecvt")
    (set_attr "mode" "DF")])
--- gcc/config/i386/pmmintrin.h.sse3	2003-11-04 09:25:10.000000000 -0800
+++ gcc/config/i386/pmmintrin.h	2004-02-06 09:09:44.000000000 -0800
@@ -30,7 +30,7 @@
 #ifndef _PMMINTRIN_H_INCLUDED
 #define _PMMINTRIN_H_INCLUDED
 
-#ifdef __PNI__
+#ifdef __SSE3__
 #include <xmmintrin.h>
 #include <emmintrin.h>
 
@@ -127,6 +127,6 @@ _mm_mwait (unsigned int __E, unsigned in
 #define _mm_mwait(E, H)		__builtin_ia32_mwait ((E), (H))
 #endif
 
-#endif /* __PNI__ */
+#endif /* __SSE3__ */
 
 #endif /* _PMMINTRIN_H_INCLUDED */
--- gcc/doc/extend.texi.sse3	2004-01-27 11:17:45.000000000 -0800
+++ gcc/doc/extend.texi	2004-02-06 09:09:45.000000000 -0800
@@ -5337,7 +5337,7 @@ Generates the @code{movhps} machine inst
 Generates the @code{movlps} machine instruction as a store to memory.
 @end table
 
-The following built-in functions are available when @option{-mpni} is used.
+The following built-in functions are available when @option{-msse3} is used.
 All of them generate the machine instruction that is part of the name.
 
 @example
@@ -5355,7 +5355,7 @@ v4sf __builtin_ia32_movsldup (v4sf)
 void __builtin_ia32_mwait (unsigned int, unsigned int)
 @end example
 
-The following built-in functions are available when @option{-mpni} is used.
+The following built-in functions are available when @option{-msse3} is used.
 
 @table @code
 @item v2df __builtin_ia32_loadddup (double const *)
--- gcc/doc/invoke.texi.sse3	2004-02-06 08:42:27.000000000 -0800
+++ gcc/doc/invoke.texi	2004-02-06 09:13:14.000000000 -0800
@@ -473,7 +473,7 @@ in the following sections.
 -mno-fp-ret-in-387  -msoft-float  -msvr3-shlib @gol
 -mno-wide-multiply  -mrtd  -malign-double @gol
 -mpreferred-stack-boundary=@var{num} @gol
--mmmx  -msse  -msse2 -mpni -m3dnow @gol
+-mmmx  -msse  -msse2 -msse3 -m3dnow @gol
 -mthreads  -mno-align-stringops  -minline-all-stringops @gol
 -mpush-args  -maccumulate-outgoing-args  -m128bit-long-double @gol
 -m96bit-long-double  -mregparm=@var{num}  -momit-leaf-frame-pointer @gol
@@ -8092,8 +8092,8 @@ preferred alignment to @option{-mpreferr
 @itemx -mno-sse
 @item -msse2
 @itemx -mno-sse2
-@item -mpni
-@itemx -mno-pni
+@item -msse3
+@itemx -mno-sse3
 @item -m3dnow
 @itemx -mno-3dnow
 @opindex mmmx
@@ -8103,7 +8103,8 @@ preferred alignment to @option{-mpreferr
 @opindex m3dnow
 @opindex mno-3dnow
 These switches enable or disable the use of built-in functions that allow
-direct access to the MMX, SSE and 3Dnow extensions of the instruction set.
+direct access to the MMX, SSE, SSE2, SSE3 and 3Dnow extensions of the
+instruction set.
 
 @xref{X86 Built-in Functions}, for details of the functions enabled
 and disabled by these switches.

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [i386] pni => sse3 -- GCC 3.3.3 related
  2004-02-06 17:41         ` H. J. Lu
@ 2004-02-06 19:09           ` Gabriel Dos Reis
  2004-02-06 20:01             ` H. J. Lu
  2004-02-21  1:36           ` Jim Wilson
  1 sibling, 1 reply; 16+ messages in thread
From: Gabriel Dos Reis @ 2004-02-06 19:09 UTC (permalink / raw)
  To: H. J. Lu; +Cc: Kelley Cook, gcc-patches, GCC Mailing List

"H. J. Lu" <hjl@lucon.org> writes:

| On Thu, Feb 05, 2004 at 02:21:11AM +0100, Gabriel Dos Reis wrote:
| > "H. J. Lu" <hjl@lucon.org> writes:
| > 
| > | On Wed, Feb 04, 2004 at 04:00:38PM +0100, Gabriel Dos Reis wrote:
| > | > Kelley Cook <kcook34@ford.com> writes:
| > | > 
| > | > | [effectiveness of rant gets lost without patch attached]
| > | > | 
| > | > | OK?
| > | > 
| > | > HJ, please would mind stepping in, and  give your inputs?
| > | > 
| > | > -- Gaby
| > | 
| > | I would prefer to remove pni from 3.4 and make it an alias for sse3 in
| > | 3.3. We should give a warning in 3.3 if pni is used.
| > 
| > Ahem.
| > 
| > Considering that you made the backport to gcc-3_3-branh, would you
| > mind making the above changes you prefer?  I'm planning to make a
| > second iteration of the prereease tonight, I would appreciate if you
| > could submit something as soon as possible.  Otherwise, the changes
| > would not go into the release (which is soon).
| > 
| 
| Here is the patch.

OK.

-- Gaby

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [i386] pni => sse3 -- GCC 3.3.3 related
  2004-02-06 19:09           ` Gabriel Dos Reis
@ 2004-02-06 20:01             ` H. J. Lu
  2004-02-12 19:15               ` Gerald Pfeifer
  0 siblings, 1 reply; 16+ messages in thread
From: H. J. Lu @ 2004-02-06 20:01 UTC (permalink / raw)
  To: Gabriel Dos Reis; +Cc: Kelley Cook, gcc-patches, GCC Mailing List

On Fri, Feb 06, 2004 at 08:01:11PM +0100, Gabriel Dos Reis wrote:
> "H. J. Lu" <hjl@lucon.org> writes:
> 
> | On Thu, Feb 05, 2004 at 02:21:11AM +0100, Gabriel Dos Reis wrote:
> | > "H. J. Lu" <hjl@lucon.org> writes:
> | > 
> | > | On Wed, Feb 04, 2004 at 04:00:38PM +0100, Gabriel Dos Reis wrote:
> | > | > Kelley Cook <kcook34@ford.com> writes:
> | > | > 
> | > | > | [effectiveness of rant gets lost without patch attached]
> | > | > | 
> | > | > | OK?
> | > | > 
> | > | > HJ, please would mind stepping in, and  give your inputs?
> | > | > 
> | > | > -- Gaby
> | > | 
> | > | I would prefer to remove pni from 3.4 and make it an alias for sse3 in
> | > | 3.3. We should give a warning in 3.3 if pni is used.
> | > 
> | > Ahem.
> | > 
> | > Considering that you made the backport to gcc-3_3-branh, would you
> | > mind making the above changes you prefer?  I'm planning to make a
> | > second iteration of the prereease tonight, I would appreciate if you
> | > could submit something as soon as possible.  Otherwise, the changes
> | > would not go into the release (which is soon).
> | > 
> | 
> | Here is the patch.
> 
> OK.

What should we do for gcc 3.4 and mainline?


H.J.

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [i386] pni => sse3 -- GCC 3.3.3 related
  2004-02-06 20:01             ` H. J. Lu
@ 2004-02-12 19:15               ` Gerald Pfeifer
  0 siblings, 0 replies; 16+ messages in thread
From: Gerald Pfeifer @ 2004-02-12 19:15 UTC (permalink / raw)
  To: H. J. Lu; +Cc: Gabriel Dos Reis, Kelley Cook, gcc-patches, GCC Mailing List

On Fri, 6 Feb 2004, H. J. Lu wrote:
>>|>| I would prefer to remove pni from 3.4 and make it an alias for sse3 in
>>|>| 3.3. We should give a warning in 3.3 if pni is used.
> What should we do for gcc 3.4 and mainline?

Thge same.  We must not make changes to a release branch, before having
made related changes to all later release branches and mainline, or we
have a regression, by definition.

Let's keep that in mind, please!

Gerald
-- 
Gerald Pfeifer (Jerry)   gerald@pfeifer.com   http://www.pfeifer.com/gerald/

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [i386] pni => sse3 -- GCC 3.3.3 related
  2004-02-06 17:41         ` H. J. Lu
  2004-02-06 19:09           ` Gabriel Dos Reis
@ 2004-02-21  1:36           ` Jim Wilson
  2004-02-21 23:29             ` H. J. Lu
  1 sibling, 1 reply; 16+ messages in thread
From: Jim Wilson @ 2004-02-21  1:36 UTC (permalink / raw)
  To: H. J. Lu; +Cc: Kelley Cook, gcc-patches, GCC Mailing List

H. J. Lu wrote:
> 2004-02-06  H.J. Lu  <hongjiu.lu@intel.com>
> 	* doc/invoke.texi: Mention SSE2 and SSE3.
> 	* config/i386/i386.h: Deprecate -mpni/-mno-pni.
> 2004-02-03  Kelley Cook  <kcook@gcc.gnu.org>
> 	* config/i386/i386.c: Rename pni to sse3.
 >	...

OK for mainline and 3.4.  3.3 would be Gaby's call.

I see that you still define __PNI__.  Do we really need that?  Maybe 
there should be some planned obsolescence for that?  I.e., we continue 
to support it for now in 3.3 but not in 3.4, or we support it in 3.4 but 
not in 3.5?
-- 
Jim Wilson, GNU Tools Support, http://www.SpecifixInc.com

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [i386] pni => sse3 -- GCC 3.3.3 related
  2004-02-21  1:36           ` Jim Wilson
@ 2004-02-21 23:29             ` H. J. Lu
  2004-02-23 21:09               ` Jim Wilson
  0 siblings, 1 reply; 16+ messages in thread
From: H. J. Lu @ 2004-02-21 23:29 UTC (permalink / raw)
  To: Jim Wilson; +Cc: Kelley Cook, gcc-patches, GCC Mailing List

On Fri, Feb 20, 2004 at 05:11:03PM -0800, Jim Wilson wrote:
> H. J. Lu wrote:
> >2004-02-06  H.J. Lu  <hongjiu.lu@intel.com>
> >	* doc/invoke.texi: Mention SSE2 and SSE3.
> >	* config/i386/i386.h: Deprecate -mpni/-mno-pni.
> >2004-02-03  Kelley Cook  <kcook@gcc.gnu.org>
> >	* config/i386/i386.c: Rename pni to sse3.
> >	...
> 
> OK for mainline and 3.4.  3.3 would be Gaby's call.
> 
> I see that you still define __PNI__.  Do we really need that?  Maybe 
> there should be some planned obsolescence for that?  I.e., we continue 
> to support it for now in 3.3 but not in 3.4, or we support it in 3.4 but 
> not in 3.5?

I think we should support __PNI__ in 3.4 and drop it in 3.5.


H.J.

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [i386] pni => sse3 -- GCC 3.3.3 related
  2004-02-21 23:29             ` H. J. Lu
@ 2004-02-23 21:09               ` Jim Wilson
  2004-02-23 23:23                 ` PATCH: [i386] pni => sse3 -- GCC 3.4 H. J. Lu
  2004-02-24  1:15                 ` [i386] pni => sse3 -- GCC 3.3.3 related H. J. Lu
  0 siblings, 2 replies; 16+ messages in thread
From: Jim Wilson @ 2004-02-23 21:09 UTC (permalink / raw)
  To: H. J. Lu; +Cc: Kelley Cook, gcc-patches, GCC Mailing List

On Sat, 2004-02-21 at 14:09, H. J. Lu wrote:
> I think we should support __PNI__ in 3.4 and drop it in 3.5.

That is fine with me.
-- 
Jim Wilson, GNU Tools Support, http://www.SpecifixInc.com

^ permalink raw reply	[flat|nested] 16+ messages in thread
* PATCH: [i386] pni => sse3 -- GCC 3.4
  2004-02-23 21:09               ` Jim Wilson
@ 2004-02-23 23:23                 ` H. J. Lu
  2004-02-23 23:24                   ` Richard Henderson
  2004-02-24  1:15                 ` [i386] pni => sse3 -- GCC 3.3.3 related H. J. Lu
  1 sibling, 1 reply; 16+ messages in thread
From: H. J. Lu @ 2004-02-23 23:23 UTC (permalink / raw)
  To: Jim Wilson; +Cc: Kelley Cook, gcc-patches, GCC Mailing List

[-- Attachment #1: Type: text/plain, Size: 238 bytes --]

On Mon, Feb 23, 2004 at 11:45:52AM -0800, Jim Wilson wrote:
> On Sat, 2004-02-21 at 14:09, H. J. Lu wrote:
> > I think we should support __PNI__ in 3.4 and drop it in 3.5.
> 
> That is fine with me.

This is the patch for gcc 3.4.


H.J.

[-- Attachment #2: gcc-3.4-sse3-1.patch --]
[-- Type: text/plain, Size: 14361 bytes --]

2004-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/i386.h: Deprecate -mpni/-mno-pni.

2004-02-03  Kelley Cook  <kcook@gcc.gnu.org>

	* config/i386/i386.c: Rename pni to sse3.
	* config/i386/i386.h: Likewise.
        * config/i386/i386.md: Likewise.
	* config/i386/pmmintrin.h: Likewise.
	* doc/extend.texi: Likewise.
	* doc/invoke.texi: Likewise.

--- gcc/config/i386/i386.c.sse3	2004-02-23 13:24:40.000000000 -0800
+++ gcc/config/i386/i386.c	2004-02-23 14:06:55.000000000 -0800
@@ -1381,8 +1381,8 @@ override_options (void)
   if (x86_arch_always_fancy_math_387 & (1 << ix86_arch))
     target_flags &= ~MASK_NO_FANCY_MATH_387;
 
-  /* Turn on SSE2 builtins for -mpni.  */
-  if (TARGET_PNI)
+  /* Turn on SSE2 builtins for -msse3.  */
+  if (TARGET_SSE3)
     target_flags |= MASK_SSE2;
 
   /* Turn on SSE builtins for -msse2.  */
@@ -13074,13 +13074,13 @@ static const struct builtin_description 
   { MASK_SSE2, CODE_FOR_cvtsd2ss, 0, IX86_BUILTIN_CVTSD2SS, 0, 0 },
   { MASK_SSE2, CODE_FOR_cvtss2sd, 0, IX86_BUILTIN_CVTSS2SD, 0, 0 },
 
-  /* PNI MMX */
-  { MASK_PNI, CODE_FOR_addsubv4sf3, "__builtin_ia32_addsubps", IX86_BUILTIN_ADDSUBPS, 0, 0 },
-  { MASK_PNI, CODE_FOR_addsubv2df3, "__builtin_ia32_addsubpd", IX86_BUILTIN_ADDSUBPD, 0, 0 },
-  { MASK_PNI, CODE_FOR_haddv4sf3, "__builtin_ia32_haddps", IX86_BUILTIN_HADDPS, 0, 0 },
-  { MASK_PNI, CODE_FOR_haddv2df3, "__builtin_ia32_haddpd", IX86_BUILTIN_HADDPD, 0, 0 },
-  { MASK_PNI, CODE_FOR_hsubv4sf3, "__builtin_ia32_hsubps", IX86_BUILTIN_HSUBPS, 0, 0 },
-  { MASK_PNI, CODE_FOR_hsubv2df3, "__builtin_ia32_hsubpd", IX86_BUILTIN_HSUBPD, 0, 0 }
+  /* SSE3 MMX */
+  { MASK_SSE3, CODE_FOR_addsubv4sf3, "__builtin_ia32_addsubps", IX86_BUILTIN_ADDSUBPS, 0, 0 },
+  { MASK_SSE3, CODE_FOR_addsubv2df3, "__builtin_ia32_addsubpd", IX86_BUILTIN_ADDSUBPD, 0, 0 },
+  { MASK_SSE3, CODE_FOR_haddv4sf3, "__builtin_ia32_haddps", IX86_BUILTIN_HADDPS, 0, 0 },
+  { MASK_SSE3, CODE_FOR_haddv2df3, "__builtin_ia32_haddpd", IX86_BUILTIN_HADDPD, 0, 0 },
+  { MASK_SSE3, CODE_FOR_hsubv4sf3, "__builtin_ia32_hsubps", IX86_BUILTIN_HSUBPS, 0, 0 },
+  { MASK_SSE3, CODE_FOR_hsubv2df3, "__builtin_ia32_hsubpd", IX86_BUILTIN_HSUBPD, 0, 0 }
 };
 
 static const struct builtin_description bdesc_1arg[] =
@@ -13128,10 +13128,10 @@ static const struct builtin_description 
 
   { MASK_SSE2, CODE_FOR_sse2_movq, 0, IX86_BUILTIN_MOVQ, 0, 0 },
 
-  /* PNI */
-  { MASK_PNI, CODE_FOR_movshdup, 0, IX86_BUILTIN_MOVSHDUP, 0, 0 },
-  { MASK_PNI, CODE_FOR_movsldup, 0, IX86_BUILTIN_MOVSLDUP, 0, 0 },
-  { MASK_PNI, CODE_FOR_movddup,  0, IX86_BUILTIN_MOVDDUP, 0, 0 }
+  /* SSE3 */
+  { MASK_SSE3, CODE_FOR_movshdup, 0, IX86_BUILTIN_MOVSHDUP, 0, 0 },
+  { MASK_SSE3, CODE_FOR_movsldup, 0, IX86_BUILTIN_MOVSLDUP, 0, 0 },
+  { MASK_SSE3, CODE_FOR_movddup,  0, IX86_BUILTIN_MOVDDUP, 0, 0 }
 };
 
 void
@@ -13757,23 +13757,23 @@ ix86_init_mmx_sse_builtins (void)
   def_builtin (MASK_SSE2, "__builtin_ia32_pmaddwd128", v4si_ftype_v8hi_v8hi, IX86_BUILTIN_PMADDWD128);
 
   /* Prescott New Instructions.  */
-  def_builtin (MASK_PNI, "__builtin_ia32_monitor",
+  def_builtin (MASK_SSE3, "__builtin_ia32_monitor",
 	       void_ftype_pcvoid_unsigned_unsigned,
 	       IX86_BUILTIN_MONITOR);
-  def_builtin (MASK_PNI, "__builtin_ia32_mwait",
+  def_builtin (MASK_SSE3, "__builtin_ia32_mwait",
 	       void_ftype_unsigned_unsigned,
 	       IX86_BUILTIN_MWAIT);
-  def_builtin (MASK_PNI, "__builtin_ia32_movshdup",
+  def_builtin (MASK_SSE3, "__builtin_ia32_movshdup",
 	       v4sf_ftype_v4sf,
 	       IX86_BUILTIN_MOVSHDUP);
-  def_builtin (MASK_PNI, "__builtin_ia32_movsldup",
+  def_builtin (MASK_SSE3, "__builtin_ia32_movsldup",
 	       v4sf_ftype_v4sf,
 	       IX86_BUILTIN_MOVSLDUP);
-  def_builtin (MASK_PNI, "__builtin_ia32_lddqu",
+  def_builtin (MASK_SSE3, "__builtin_ia32_lddqu",
 	       v16qi_ftype_pcchar, IX86_BUILTIN_LDDQU);
-  def_builtin (MASK_PNI, "__builtin_ia32_loadddup",
+  def_builtin (MASK_SSE3, "__builtin_ia32_loadddup",
 	       v2df_ftype_pcdouble, IX86_BUILTIN_LOADDDUP);
-  def_builtin (MASK_PNI, "__builtin_ia32_movddup",
+  def_builtin (MASK_SSE3, "__builtin_ia32_movddup",
 	       v2df_ftype_v2df, IX86_BUILTIN_MOVDDUP);
 }
 
--- gcc/config/i386/i386.h.sse3	2004-02-23 13:24:40.000000000 -0800
+++ gcc/config/i386/i386.h	2004-02-23 14:21:25.000000000 -0800
@@ -121,7 +121,7 @@ extern int target_flags;
 #define MASK_MMX		0x00002000	/* Support MMX regs/builtins */
 #define MASK_SSE		0x00004000	/* Support SSE regs/builtins */
 #define MASK_SSE2		0x00008000	/* Support SSE2 regs/builtins */
-#define MASK_PNI		0x00010000	/* Support PNI regs/builtins */
+#define MASK_SSE3		0x00010000	/* Support SSE3 regs/builtins */
 #define MASK_3DNOW		0x00020000	/* Support 3Dnow builtins */
 #define MASK_3DNOW_A		0x00040000	/* Support Athlon 3Dnow builtins */
 #define MASK_128BIT_LONG_DOUBLE 0x00080000	/* long double size is 128bit */
@@ -303,7 +303,7 @@ extern int x86_prefetch_sse;
 
 #define TARGET_SSE ((target_flags & MASK_SSE) != 0)
 #define TARGET_SSE2 ((target_flags & MASK_SSE2) != 0)
-#define TARGET_PNI ((target_flags & MASK_PNI) != 0)
+#define TARGET_SSE3 ((target_flags & MASK_SSE3) != 0)
 #define TARGET_SSE_MATH ((ix86_fpmath & FPMATH_SSE) != 0)
 #define TARGET_MIX_SSE_I387 ((ix86_fpmath & FPMATH_SSE) \
 			     && (ix86_fpmath & FPMATH_387))
@@ -333,6 +333,8 @@ extern int x86_prefetch_sse;
   { "486",			 0, "" /*Deprecated.*/},		      \
   { "pentium",			 0, "" /*Deprecated.*/},		      \
   { "pentiumpro",		 0, "" /*Deprecated.*/},		      \
+  { "pni",			 0, "" /*Deprecated.*/},		      \
+  { "no-pni",			 0, "" /*Deprecated.*/},		      \
   { "intel-syntax",		 0, "" /*Deprecated.*/},	 	      \
   { "no-intel-syntax",		 0, "" /*Deprecated.*/},	 	      \
   { "rtd",			 MASK_RTD,				      \
@@ -399,10 +401,10 @@ extern int x86_prefetch_sse;
     N_("Support MMX, SSE and SSE2 built-in functions and code generation") }, \
   { "no-sse2",			 -MASK_SSE2,				      \
     N_("Do not support MMX, SSE and SSE2 built-in functions and code generation") },    \
-  { "pni",			 MASK_PNI,				      \
-    N_("Support MMX, SSE, SSE2 and PNI built-in functions and code generation") },\
-  { "no-pni",			 -MASK_PNI,				      \
-    N_("Do not support MMX, SSE, SSE2 and PNI built-in functions and code generation") },\
+  { "sse3",			 MASK_SSE3,				      \
+    N_("Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation") },\
+  { "no-sse3",			 -MASK_SSE3,				      \
+    N_("Do not support MMX, SSE, SSE2 and SSE3 built-in functions and code generation") },\
   { "128bit-long-double",	 MASK_128BIT_LONG_DOUBLE,		      \
     N_("sizeof(long double) is 16") },					      \
   { "96bit-long-double",	-MASK_128BIT_LONG_DOUBLE,		      \
@@ -528,6 +530,10 @@ extern int x86_prefetch_sse;
 %{mcpu=*:-mtune=%* \
 %n`-mcpu=' is deprecated. Use `-mtune=' or '-march=' instead.\n}} \
 %<mcpu=* \
+%{mpni:-msse3 \
+%n`-mpni' is deprecated. Use `-msse3' instead.\n} \
+%{mno-pni:-mno-sse3 \
+%n`-mno-pni' is deprecated. Use `-mno-sse3' instead.\n} \
 %{mintel-syntax:-masm=intel \
 %n`-mintel-syntax' is deprecated. Use `-masm=intel' instead.\n} \
 %{mno-intel-syntax:-masm=att \
@@ -616,8 +622,11 @@ extern int x86_prefetch_sse;
 	builtin_define ("__SSE__");				\
       if (TARGET_SSE2)						\
 	builtin_define ("__SSE2__");				\
-      if (TARGET_PNI)						\
-	builtin_define ("__PNI__");				\
+      if (TARGET_SSE3)						\
+	{							\
+	  builtin_define ("__SSE3__");				\
+	  builtin_define ("__PNI__");				\
+	}							\
       if (TARGET_SSE_MATH && TARGET_SSE)			\
 	builtin_define ("__SSE_MATH__");			\
       if (TARGET_SSE_MATH && TARGET_SSE2)			\
--- gcc/config/i386/i386.md.sse3	2004-02-23 13:24:40.000000000 -0800
+++ gcc/config/i386/i386.md	2004-02-23 14:06:55.000000000 -0800
@@ -22843,13 +22843,13 @@
   [(set_attr "type" "sse")
    (set_attr "memory" "unknown")])
 
-;; PNI
+;; SSE3
 
 (define_insn "mwait"
   [(unspec_volatile [(match_operand:SI 0 "register_operand" "a")
 		     (match_operand:SI 1 "register_operand" "c")]
 		    UNSPECV_MWAIT)]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "mwait\t%0, %1"
   [(set_attr "length" "3")])
 
@@ -22858,18 +22858,18 @@
 		     (match_operand:SI 1 "register_operand" "c")
 		     (match_operand:SI 2 "register_operand" "d")]
 		    UNSPECV_MONITOR)]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "monitor\t%0, %1, %2"
   [(set_attr "length" "3")])
 
-;; PNI arithmetic
+;; SSE3 arithmetic
 
 (define_insn "addsubv4sf3"
   [(set (match_operand:V4SF 0 "register_operand" "=x")
         (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "0")
 		      (match_operand:V4SF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_ADDSUB))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "addsubps\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V4SF")])
@@ -22879,7 +22879,7 @@
         (unspec:V2DF [(match_operand:V2DF 1 "register_operand" "0")
 		      (match_operand:V2DF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_ADDSUB))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "addsubpd\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V2DF")])
@@ -22889,7 +22889,7 @@
         (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "0")
 		      (match_operand:V4SF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_HADD))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "haddps\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V4SF")])
@@ -22899,7 +22899,7 @@
         (unspec:V2DF [(match_operand:V2DF 1 "register_operand" "0")
 		      (match_operand:V2DF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_HADD))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "haddpd\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V2DF")])
@@ -22909,7 +22909,7 @@
         (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "0")
 		      (match_operand:V4SF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_HSUB))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "hsubps\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V4SF")])
@@ -22919,7 +22919,7 @@
         (unspec:V2DF [(match_operand:V2DF 1 "register_operand" "0")
 		      (match_operand:V2DF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_HSUB))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "hsubpd\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V2DF")])
@@ -22928,7 +22928,7 @@
   [(set (match_operand:V4SF 0 "register_operand" "=x")
         (unspec:V4SF
 	 [(match_operand:V4SF 1 "nonimmediate_operand" "xm")] UNSPEC_MOVSHDUP))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "movshdup\t{%1, %0|%0, %1}"
   [(set_attr "type" "sse")
    (set_attr "mode" "V4SF")])
@@ -22937,7 +22937,7 @@
   [(set (match_operand:V4SF 0 "register_operand" "=x")
         (unspec:V4SF
 	 [(match_operand:V4SF 1 "nonimmediate_operand" "xm")] UNSPEC_MOVSLDUP))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "movsldup\t{%1, %0|%0, %1}"
   [(set_attr "type" "sse")
    (set_attr "mode" "V4SF")])
@@ -22946,7 +22946,7 @@
   [(set (match_operand:V16QI 0 "register_operand" "=x")
 	(unspec:V16QI [(match_operand:V16QI 1 "memory_operand" "m")]
 		       UNSPEC_LDQQU))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "lddqu\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecvt")
    (set_attr "mode" "TI")])
@@ -22954,7 +22954,7 @@
 (define_insn "loadddup"
   [(set (match_operand:V2DF 0 "register_operand" "=x")
 	(vec_duplicate:V2DF (match_operand:DF 1 "memory_operand" "m")))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "movddup\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecvt")
    (set_attr "mode" "DF")])
@@ -22964,7 +22964,7 @@
 	(vec_duplicate:V2DF
 	 (vec_select:DF (match_operand:V2DF 1 "register_operand" "x")
 			(parallel [(const_int 0)]))))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "movddup\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecvt")
    (set_attr "mode" "DF")])
--- gcc/config/i386/pmmintrin.h.sse3	2003-10-01 01:01:10.000000000 -0700
+++ gcc/config/i386/pmmintrin.h	2004-02-23 14:06:55.000000000 -0800
@@ -30,7 +30,7 @@
 #ifndef _PMMINTRIN_H_INCLUDED
 #define _PMMINTRIN_H_INCLUDED
 
-#ifdef __PNI__
+#ifdef __SSE3__
 #include <xmmintrin.h>
 #include <emmintrin.h>
 
@@ -127,6 +127,6 @@ _mm_mwait (unsigned int __E, unsigned in
 #define _mm_mwait(E, H)		__builtin_ia32_mwait ((E), (H))
 #endif
 
-#endif /* __PNI__ */
+#endif /* __SSE3__ */
 
 #endif /* _PMMINTRIN_H_INCLUDED */
--- gcc/doc/extend.texi.sse3	2004-02-23 13:24:55.000000000 -0800
+++ gcc/doc/extend.texi	2004-02-23 14:06:55.000000000 -0800
@@ -6065,7 +6065,7 @@ Generates the @code{movhps} machine inst
 Generates the @code{movlps} machine instruction as a store to memory.
 @end table
 
-The following built-in functions are available when @option{-mpni} is used.
+The following built-in functions are available when @option{-msse3} is used.
 All of them generate the machine instruction that is part of the name.
 
 @smallexample
@@ -6083,7 +6083,7 @@ v4sf __builtin_ia32_movsldup (v4sf)
 void __builtin_ia32_mwait (unsigned int, unsigned int)
 @end smallexample
 
-The following built-in functions are available when @option{-mpni} is used.
+The following built-in functions are available when @option{-msse3} is used.
 
 @table @code
 @item v2df __builtin_ia32_loadddup (double const *)
--- gcc/doc/invoke.texi.sse3	2004-02-23 13:24:56.000000000 -0800
+++ gcc/doc/invoke.texi	2004-02-23 14:06:55.000000000 -0800
@@ -490,7 +490,7 @@ in the following sections.
 -mno-fp-ret-in-387  -msoft-float  -msvr3-shlib @gol
 -mno-wide-multiply  -mrtd  -malign-double @gol
 -mpreferred-stack-boundary=@var{num} @gol
--mmmx  -msse  -msse2 -mpni -m3dnow @gol
+-mmmx  -msse  -msse2 -msse3 -m3dnow @gol
 -mthreads  -mno-align-stringops  -minline-all-stringops @gol
 -mpush-args  -maccumulate-outgoing-args  -m128bit-long-double @gol
 -m96bit-long-double  -mregparm=@var{num}  -momit-leaf-frame-pointer @gol
@@ -8404,8 +8404,8 @@ preferred alignment to @option{-mpreferr
 @itemx -mno-sse
 @item -msse2
 @itemx -mno-sse2
-@item -mpni
-@itemx -mno-pni
+@item -msse3
+@itemx -mno-sse3
 @item -m3dnow
 @itemx -mno-3dnow
 @opindex mmmx
@@ -8415,7 +8415,7 @@ preferred alignment to @option{-mpreferr
 @opindex m3dnow
 @opindex mno-3dnow
 These switches enable or disable the use of built-in functions that allow
-direct access to the MMX, SSE, SSE2, PNI and 3Dnow extensions of the
+direct access to the MMX, SSE, SSE2, SSE3 and 3Dnow extensions of the
 instruction set.
 
 @xref{X86 Built-in Functions}, for details of the functions enabled

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: PATCH: [i386] pni => sse3 -- GCC 3.4
  2004-02-23 23:23                 ` PATCH: [i386] pni => sse3 -- GCC 3.4 H. J. Lu
@ 2004-02-23 23:24                   ` Richard Henderson
  0 siblings, 0 replies; 16+ messages in thread
From: Richard Henderson @ 2004-02-23 23:24 UTC (permalink / raw)
  To: H. J. Lu; +Cc: Jim Wilson, Kelley Cook, gcc-patches, GCC Mailing List

Ok.


r~

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [i386] pni => sse3 -- GCC 3.3.3 related
  2004-02-23 21:09               ` Jim Wilson
  2004-02-23 23:23                 ` PATCH: [i386] pni => sse3 -- GCC 3.4 H. J. Lu
@ 2004-02-24  1:15                 ` H. J. Lu
  2004-02-24  3:39                   ` Jim Wilson
  1 sibling, 1 reply; 16+ messages in thread
From: H. J. Lu @ 2004-02-24  1:15 UTC (permalink / raw)
  To: Jim Wilson; +Cc: Kelley Cook, gcc-patches, GCC Mailing List

[-- Attachment #1: Type: text/plain, Size: 239 bytes --]

On Mon, Feb 23, 2004 at 11:45:52AM -0800, Jim Wilson wrote:
> On Sat, 2004-02-21 at 14:09, H. J. Lu wrote:
> > I think we should support __PNI__ in 3.4 and drop it in 3.5.
> 
> That is fine with me.

This is the patch for mainline.


H.J.

[-- Attachment #2: gcc-sse3-1.patch --]
[-- Type: text/plain, Size: 13312 bytes --]

2004-02-03  Kelley Cook  <kcook@gcc.gnu.org>

	* config/i386/i386.c: Rename pni to sse3.
	* config/i386/i386.h: Likewise.
        * config/i386/i386.md: Likewise.
	* config/i386/pmmintrin.h: Likewise.
	* doc/extend.texi: Likewise.
	* doc/invoke.texi: Likewise.

--- gcc/config/i386/i386.c.sse3	2004-02-23 13:27:45.000000000 -0800
+++ gcc/config/i386/i386.c	2004-02-23 13:59:03.000000000 -0800
@@ -1391,8 +1391,8 @@ override_options (void)
   if (x86_arch_always_fancy_math_387 & (1 << ix86_arch))
     target_flags &= ~MASK_NO_FANCY_MATH_387;
 
-  /* Turn on SSE2 builtins for -mpni.  */
-  if (TARGET_PNI)
+  /* Turn on SSE2 builtins for -msse3.  */
+  if (TARGET_SSE3)
     target_flags |= MASK_SSE2;
 
   /* Turn on SSE builtins for -msse2.  */
@@ -13072,13 +13072,13 @@ static const struct builtin_description 
   { MASK_SSE2, CODE_FOR_cvtsd2ss, 0, IX86_BUILTIN_CVTSD2SS, 0, 0 },
   { MASK_SSE2, CODE_FOR_cvtss2sd, 0, IX86_BUILTIN_CVTSS2SD, 0, 0 },
 
-  /* PNI MMX */
-  { MASK_PNI, CODE_FOR_addsubv4sf3, "__builtin_ia32_addsubps", IX86_BUILTIN_ADDSUBPS, 0, 0 },
-  { MASK_PNI, CODE_FOR_addsubv2df3, "__builtin_ia32_addsubpd", IX86_BUILTIN_ADDSUBPD, 0, 0 },
-  { MASK_PNI, CODE_FOR_haddv4sf3, "__builtin_ia32_haddps", IX86_BUILTIN_HADDPS, 0, 0 },
-  { MASK_PNI, CODE_FOR_haddv2df3, "__builtin_ia32_haddpd", IX86_BUILTIN_HADDPD, 0, 0 },
-  { MASK_PNI, CODE_FOR_hsubv4sf3, "__builtin_ia32_hsubps", IX86_BUILTIN_HSUBPS, 0, 0 },
-  { MASK_PNI, CODE_FOR_hsubv2df3, "__builtin_ia32_hsubpd", IX86_BUILTIN_HSUBPD, 0, 0 }
+  /* SSE3 MMX */
+  { MASK_SSE3, CODE_FOR_addsubv4sf3, "__builtin_ia32_addsubps", IX86_BUILTIN_ADDSUBPS, 0, 0 },
+  { MASK_SSE3, CODE_FOR_addsubv2df3, "__builtin_ia32_addsubpd", IX86_BUILTIN_ADDSUBPD, 0, 0 },
+  { MASK_SSE3, CODE_FOR_haddv4sf3, "__builtin_ia32_haddps", IX86_BUILTIN_HADDPS, 0, 0 },
+  { MASK_SSE3, CODE_FOR_haddv2df3, "__builtin_ia32_haddpd", IX86_BUILTIN_HADDPD, 0, 0 },
+  { MASK_SSE3, CODE_FOR_hsubv4sf3, "__builtin_ia32_hsubps", IX86_BUILTIN_HSUBPS, 0, 0 },
+  { MASK_SSE3, CODE_FOR_hsubv2df3, "__builtin_ia32_hsubpd", IX86_BUILTIN_HSUBPD, 0, 0 }
 };
 
 static const struct builtin_description bdesc_1arg[] =
@@ -13126,10 +13126,10 @@ static const struct builtin_description 
 
   { MASK_SSE2, CODE_FOR_sse2_movq, 0, IX86_BUILTIN_MOVQ, 0, 0 },
 
-  /* PNI */
-  { MASK_PNI, CODE_FOR_movshdup, 0, IX86_BUILTIN_MOVSHDUP, 0, 0 },
-  { MASK_PNI, CODE_FOR_movsldup, 0, IX86_BUILTIN_MOVSLDUP, 0, 0 },
-  { MASK_PNI, CODE_FOR_movddup,  0, IX86_BUILTIN_MOVDDUP, 0, 0 }
+  /* SSE3 */
+  { MASK_SSE3, CODE_FOR_movshdup, 0, IX86_BUILTIN_MOVSHDUP, 0, 0 },
+  { MASK_SSE3, CODE_FOR_movsldup, 0, IX86_BUILTIN_MOVSLDUP, 0, 0 },
+  { MASK_SSE3, CODE_FOR_movddup,  0, IX86_BUILTIN_MOVDDUP, 0, 0 }
 };
 
 void
@@ -13755,23 +13755,23 @@ ix86_init_mmx_sse_builtins (void)
   def_builtin (MASK_SSE2, "__builtin_ia32_pmaddwd128", v4si_ftype_v8hi_v8hi, IX86_BUILTIN_PMADDWD128);
 
   /* Prescott New Instructions.  */
-  def_builtin (MASK_PNI, "__builtin_ia32_monitor",
+  def_builtin (MASK_SSE3, "__builtin_ia32_monitor",
 	       void_ftype_pcvoid_unsigned_unsigned,
 	       IX86_BUILTIN_MONITOR);
-  def_builtin (MASK_PNI, "__builtin_ia32_mwait",
+  def_builtin (MASK_SSE3, "__builtin_ia32_mwait",
 	       void_ftype_unsigned_unsigned,
 	       IX86_BUILTIN_MWAIT);
-  def_builtin (MASK_PNI, "__builtin_ia32_movshdup",
+  def_builtin (MASK_SSE3, "__builtin_ia32_movshdup",
 	       v4sf_ftype_v4sf,
 	       IX86_BUILTIN_MOVSHDUP);
-  def_builtin (MASK_PNI, "__builtin_ia32_movsldup",
+  def_builtin (MASK_SSE3, "__builtin_ia32_movsldup",
 	       v4sf_ftype_v4sf,
 	       IX86_BUILTIN_MOVSLDUP);
-  def_builtin (MASK_PNI, "__builtin_ia32_lddqu",
+  def_builtin (MASK_SSE3, "__builtin_ia32_lddqu",
 	       v16qi_ftype_pcchar, IX86_BUILTIN_LDDQU);
-  def_builtin (MASK_PNI, "__builtin_ia32_loadddup",
+  def_builtin (MASK_SSE3, "__builtin_ia32_loadddup",
 	       v2df_ftype_pcdouble, IX86_BUILTIN_LOADDDUP);
-  def_builtin (MASK_PNI, "__builtin_ia32_movddup",
+  def_builtin (MASK_SSE3, "__builtin_ia32_movddup",
 	       v2df_ftype_v2df, IX86_BUILTIN_MOVDDUP);
 }
 
--- gcc/config/i386/i386.h.sse3	2004-02-23 13:27:45.000000000 -0800
+++ gcc/config/i386/i386.h	2004-02-23 14:20:16.000000000 -0800
@@ -121,7 +121,7 @@ extern int target_flags;
 #define MASK_MMX		0x00002000	/* Support MMX regs/builtins */
 #define MASK_SSE		0x00004000	/* Support SSE regs/builtins */
 #define MASK_SSE2		0x00008000	/* Support SSE2 regs/builtins */
-#define MASK_PNI		0x00010000	/* Support PNI regs/builtins */
+#define MASK_SSE3		0x00010000	/* Support SSE3 regs/builtins */
 #define MASK_3DNOW		0x00020000	/* Support 3Dnow builtins */
 #define MASK_3DNOW_A		0x00040000	/* Support Athlon 3Dnow builtins */
 #define MASK_128BIT_LONG_DOUBLE 0x00080000	/* long double size is 128bit */
@@ -304,7 +304,7 @@ extern int x86_prefetch_sse;
 
 #define TARGET_SSE ((target_flags & MASK_SSE) != 0)
 #define TARGET_SSE2 ((target_flags & MASK_SSE2) != 0)
-#define TARGET_PNI ((target_flags & MASK_PNI) != 0)
+#define TARGET_SSE3 ((target_flags & MASK_SSE3) != 0)
 #define TARGET_SSE_MATH ((ix86_fpmath & FPMATH_SSE) != 0)
 #define TARGET_MIX_SSE_I387 ((ix86_fpmath & FPMATH_SSE) \
 			     && (ix86_fpmath & FPMATH_387))
@@ -400,10 +400,10 @@ extern int x86_prefetch_sse;
     N_("Support MMX, SSE and SSE2 built-in functions and code generation") }, \
   { "no-sse2",			 -MASK_SSE2,				      \
     N_("Do not support MMX, SSE and SSE2 built-in functions and code generation") },    \
-  { "pni",			 MASK_PNI,				      \
-    N_("Support MMX, SSE, SSE2 and PNI built-in functions and code generation") },\
-  { "no-pni",			 -MASK_PNI,				      \
-    N_("Do not support MMX, SSE, SSE2 and PNI built-in functions and code generation") },\
+  { "sse3",			 MASK_SSE3,				      \
+    N_("Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation") },\
+  { "no-sse3",			 -MASK_SSE3,				      \
+    N_("Do not support MMX, SSE, SSE2 and SSE3 built-in functions and code generation") },\
   { "128bit-long-double",	 MASK_128BIT_LONG_DOUBLE,		      \
     N_("sizeof(long double) is 16") },					      \
   { "96bit-long-double",	-MASK_128BIT_LONG_DOUBLE,		      \
@@ -617,8 +617,8 @@ extern int x86_prefetch_sse;
 	builtin_define ("__SSE__");				\
       if (TARGET_SSE2)						\
 	builtin_define ("__SSE2__");				\
-      if (TARGET_PNI)						\
-	builtin_define ("__PNI__");				\
+      if (TARGET_SSE3)						\
+	builtin_define ("__SSE3__");				\
       if (TARGET_SSE_MATH && TARGET_SSE)			\
 	builtin_define ("__SSE_MATH__");			\
       if (TARGET_SSE_MATH && TARGET_SSE2)			\
--- gcc/config/i386/i386.md.sse3	2004-02-23 13:27:45.000000000 -0800
+++ gcc/config/i386/i386.md	2004-02-23 13:59:03.000000000 -0800
@@ -22930,13 +22930,13 @@
   [(set_attr "type" "sse")
    (set_attr "memory" "unknown")])
 
-;; PNI
+;; SSE3
 
 (define_insn "mwait"
   [(unspec_volatile [(match_operand:SI 0 "register_operand" "a")
 		     (match_operand:SI 1 "register_operand" "c")]
 		    UNSPECV_MWAIT)]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "mwait\t%0, %1"
   [(set_attr "length" "3")])
 
@@ -22945,18 +22945,18 @@
 		     (match_operand:SI 1 "register_operand" "c")
 		     (match_operand:SI 2 "register_operand" "d")]
 		    UNSPECV_MONITOR)]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "monitor\t%0, %1, %2"
   [(set_attr "length" "3")])
 
-;; PNI arithmetic
+;; SSE3 arithmetic
 
 (define_insn "addsubv4sf3"
   [(set (match_operand:V4SF 0 "register_operand" "=x")
         (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "0")
 		      (match_operand:V4SF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_ADDSUB))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "addsubps\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V4SF")])
@@ -22966,7 +22966,7 @@
         (unspec:V2DF [(match_operand:V2DF 1 "register_operand" "0")
 		      (match_operand:V2DF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_ADDSUB))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "addsubpd\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V2DF")])
@@ -22976,7 +22976,7 @@
         (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "0")
 		      (match_operand:V4SF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_HADD))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "haddps\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V4SF")])
@@ -22986,7 +22986,7 @@
         (unspec:V2DF [(match_operand:V2DF 1 "register_operand" "0")
 		      (match_operand:V2DF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_HADD))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "haddpd\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V2DF")])
@@ -22996,7 +22996,7 @@
         (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "0")
 		      (match_operand:V4SF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_HSUB))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "hsubps\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V4SF")])
@@ -23006,7 +23006,7 @@
         (unspec:V2DF [(match_operand:V2DF 1 "register_operand" "0")
 		      (match_operand:V2DF 2 "nonimmediate_operand" "xm")]
 		     UNSPEC_HSUB))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "hsubpd\t{%2, %0|%0, %2}"
   [(set_attr "type" "sseadd")
    (set_attr "mode" "V2DF")])
@@ -23015,7 +23015,7 @@
   [(set (match_operand:V4SF 0 "register_operand" "=x")
         (unspec:V4SF
 	 [(match_operand:V4SF 1 "nonimmediate_operand" "xm")] UNSPEC_MOVSHDUP))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "movshdup\t{%1, %0|%0, %1}"
   [(set_attr "type" "sse")
    (set_attr "mode" "V4SF")])
@@ -23024,7 +23024,7 @@
   [(set (match_operand:V4SF 0 "register_operand" "=x")
         (unspec:V4SF
 	 [(match_operand:V4SF 1 "nonimmediate_operand" "xm")] UNSPEC_MOVSLDUP))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "movsldup\t{%1, %0|%0, %1}"
   [(set_attr "type" "sse")
    (set_attr "mode" "V4SF")])
@@ -23033,7 +23033,7 @@
   [(set (match_operand:V16QI 0 "register_operand" "=x")
 	(unspec:V16QI [(match_operand:V16QI 1 "memory_operand" "m")]
 		       UNSPEC_LDQQU))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "lddqu\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecvt")
    (set_attr "mode" "TI")])
@@ -23041,7 +23041,7 @@
 (define_insn "loadddup"
   [(set (match_operand:V2DF 0 "register_operand" "=x")
 	(vec_duplicate:V2DF (match_operand:DF 1 "memory_operand" "m")))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "movddup\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecvt")
    (set_attr "mode" "DF")])
@@ -23051,7 +23051,7 @@
 	(vec_duplicate:V2DF
 	 (vec_select:DF (match_operand:V2DF 1 "register_operand" "x")
 			(parallel [(const_int 0)]))))]
-  "TARGET_PNI"
+  "TARGET_SSE3"
   "movddup\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssecvt")
    (set_attr "mode" "DF")])
--- gcc/config/i386/pmmintrin.h.sse3	2003-10-01 01:01:10.000000000 -0700
+++ gcc/config/i386/pmmintrin.h	2004-02-23 13:59:03.000000000 -0800
@@ -30,7 +30,7 @@
 #ifndef _PMMINTRIN_H_INCLUDED
 #define _PMMINTRIN_H_INCLUDED
 
-#ifdef __PNI__
+#ifdef __SSE3__
 #include <xmmintrin.h>
 #include <emmintrin.h>
 
@@ -127,6 +127,6 @@ _mm_mwait (unsigned int __E, unsigned in
 #define _mm_mwait(E, H)		__builtin_ia32_mwait ((E), (H))
 #endif
 
-#endif /* __PNI__ */
+#endif /* __SSE3__ */
 
 #endif /* _PMMINTRIN_H_INCLUDED */
--- gcc/doc/extend.texi.sse3	2004-02-23 13:27:50.000000000 -0800
+++ gcc/doc/extend.texi	2004-02-23 13:59:03.000000000 -0800
@@ -5977,7 +5977,7 @@ Generates the @code{movhps} machine inst
 Generates the @code{movlps} machine instruction as a store to memory.
 @end table
 
-The following built-in functions are available when @option{-mpni} is used.
+The following built-in functions are available when @option{-msse3} is used.
 All of them generate the machine instruction that is part of the name.
 
 @smallexample
@@ -5995,7 +5995,7 @@ v4sf __builtin_ia32_movsldup (v4sf)
 void __builtin_ia32_mwait (unsigned int, unsigned int)
 @end smallexample
 
-The following built-in functions are available when @option{-mpni} is used.
+The following built-in functions are available when @option{-msse3} is used.
 
 @table @code
 @item v2df __builtin_ia32_loadddup (double const *)
--- gcc/doc/invoke.texi.sse3	2004-02-23 13:27:50.000000000 -0800
+++ gcc/doc/invoke.texi	2004-02-23 14:00:08.000000000 -0800
@@ -489,7 +489,7 @@ in the following sections.
 -mno-fp-ret-in-387  -msoft-float  -msvr3-shlib @gol
 -mno-wide-multiply  -mrtd  -malign-double @gol
 -mpreferred-stack-boundary=@var{num} @gol
--mmmx  -msse  -msse2 -mpni -m3dnow @gol
+-mmmx  -msse  -msse2 -msse3 -m3dnow @gol
 -mthreads  -mno-align-stringops  -minline-all-stringops @gol
 -mpush-args  -maccumulate-outgoing-args  -m128bit-long-double @gol
 -m96bit-long-double  -mregparm=@var{num}  -momit-leaf-frame-pointer @gol
@@ -8398,8 +8398,8 @@ preferred alignment to @option{-mpreferr
 @itemx -mno-sse
 @item -msse2
 @itemx -mno-sse2
-@item -mpni
-@itemx -mno-pni
+@item -msse3
+@itemx -mno-sse3
 @item -m3dnow
 @itemx -mno-3dnow
 @opindex mmmx
@@ -8409,7 +8409,7 @@ preferred alignment to @option{-mpreferr
 @opindex m3dnow
 @opindex mno-3dnow
 These switches enable or disable the use of built-in functions that allow
-direct access to the MMX, SSE, SSE2, PNI and 3Dnow extensions of the
+direct access to the MMX, SSE, SSE2, SSE3 and 3Dnow extensions of the
 instruction set.
 
 @xref{X86 Built-in Functions}, for details of the functions enabled

^ permalink raw reply	[flat|nested] 16+ messages in thread
* Re: [i386] pni => sse3 -- GCC 3.3.3 related
  2004-02-24  1:15                 ` [i386] pni => sse3 -- GCC 3.3.3 related H. J. Lu
@ 2004-02-24  3:39                   ` Jim Wilson
  0 siblings, 0 replies; 16+ messages in thread
From: Jim Wilson @ 2004-02-24  3:39 UTC (permalink / raw)
  To: H. J. Lu; +Cc: Kelley Cook, gcc-patches, GCC Mailing List

On Mon, 2004-02-23 at 16:24, H. J. Lu wrote:
> This is the patch for mainline.

OK.
-- 
Jim Wilson, GNU Tools Support, http://www.SpecifixInc.com

^ permalink raw reply	[flat|nested] 16+ messages in thread
end of thread, other threads:[~2004-02-24  2:30 UTC | newest]

Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2004-02-03 22:25 [i386] pni => sse3 -- GCC 3.3.3 related Kelley Cook
2004-02-03 22:00 ` Kelley Cook
2004-02-04 15:08   ` Gabriel Dos Reis
2004-02-05  1:11     ` H. J. Lu
2004-02-05  1:28       ` Gabriel Dos Reis
2004-02-06 17:41         ` H. J. Lu
2004-02-06 19:09           ` Gabriel Dos Reis
2004-02-06 20:01             ` H. J. Lu
2004-02-12 19:15               ` Gerald Pfeifer
2004-02-21  1:36           ` Jim Wilson
2004-02-21 23:29             ` H. J. Lu
2004-02-23 21:09               ` Jim Wilson
2004-02-23 23:23                 ` PATCH: [i386] pni => sse3 -- GCC 3.4 H. J. Lu
2004-02-23 23:24                   ` Richard Henderson
2004-02-24  1:15                 ` [i386] pni => sse3 -- GCC 3.3.3 related H. J. Lu
2004-02-24  3:39                   ` Jim Wilson

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